On Thu, 22 Aug 2024, Mario Limonciello wrote: > From: Mario Limonciello <mario.limonciello@xxxxxxx> > > A string is passed to all callers of pci_dev_wait() which is utilized > to demonstrate what kind of reset happened when there was a problem. > > This doesn't allow making the behavior for different reset types > conditional though. Lay some plumbing to allow making comparisons of > reset types with integers instead. No functional changes. > > Suggested-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx> > Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx> -- i. > --- > v3->v4: > * Use index-based array initialization format for pci_reset_types > * Fix LKP reported sparse issue > --- > drivers/pci/pci-driver.c | 2 +- > drivers/pci/pci.c | 29 +++++++++++++++++++---------- > drivers/pci/pci.h | 11 ++++++++++- > drivers/pci/pcie/dpc.c | 2 +- > 4 files changed, 31 insertions(+), 13 deletions(-) > > diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c > index f412ef73a6e4b..ac3cfbfa137d9 100644 > --- a/drivers/pci/pci-driver.c > +++ b/drivers/pci/pci-driver.c > @@ -572,7 +572,7 @@ static void pci_pm_bridge_power_up_actions(struct pci_dev *pci_dev) > { > int ret; > > - ret = pci_bridge_wait_for_secondary_bus(pci_dev, "resume"); > + ret = pci_bridge_wait_for_secondary_bus(pci_dev, PCI_DEV_WAIT_RESUME); > if (ret) { > /* > * The downstream link failed to come up, so mark the > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index ffaaca0978cbc..e4a7f5dfe6bf4 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -181,6 +181,15 @@ static int __init pcie_port_pm_setup(char *str) > } > __setup("pcie_port_pm=", pcie_port_pm_setup); > > +static const char * const pci_reset_types[] = { > + [PCI_DEV_WAIT_FLR] = "FLR", > + [PCI_DEV_WAIT_AF_FLR] = "AF_FLR", > + [PCI_DEV_WAIT_D3HOT_D0] = "PM D3HOT->D0", > + [PCI_DEV_WAIT_BUS_RESET] = "bus reset", > + [PCI_DEV_WAIT_RESUME] = "resume", > + [PCI_DEV_WAIT_DPC] = "DPC", > +}; > + > /** > * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children > * @bus: pointer to PCI bus structure to search > @@ -1279,7 +1288,7 @@ void pci_resume_bus(struct pci_bus *bus) > pci_walk_bus(bus, pci_resume_one, NULL); > } > > -static int pci_dev_wait(struct pci_dev *dev, char *reset_type, int timeout) > +static int pci_dev_wait(struct pci_dev *dev, enum pci_reset_type reset_type, int timeout) > { > int delay = 1; > bool retrain = false; > @@ -1317,7 +1326,7 @@ static int pci_dev_wait(struct pci_dev *dev, char *reset_type, int timeout) > > if (delay > timeout) { > pci_warn(dev, "not ready %dms after %s; giving up\n", > - delay - 1, reset_type); > + delay - 1, pci_reset_types[reset_type]); > return -ENOTTY; > } > > @@ -1330,7 +1339,7 @@ static int pci_dev_wait(struct pci_dev *dev, char *reset_type, int timeout) > } > } > pci_info(dev, "not ready %dms after %s; waiting\n", > - delay - 1, reset_type); > + delay - 1, pci_reset_types[reset_type]); > } > > msleep(delay); > @@ -1339,10 +1348,10 @@ static int pci_dev_wait(struct pci_dev *dev, char *reset_type, int timeout) > > if (delay > PCI_RESET_WAIT) > pci_info(dev, "ready %dms after %s\n", delay - 1, > - reset_type); > + pci_reset_types[reset_type]); > else > pci_dbg(dev, "ready %dms after %s\n", delay - 1, > - reset_type); > + pci_reset_types[reset_type]); > > return 0; > } > @@ -4536,7 +4545,7 @@ int pcie_flr(struct pci_dev *dev) > */ > msleep(100); > > - return pci_dev_wait(dev, "FLR", PCIE_RESET_READY_POLL_MS); > + return pci_dev_wait(dev, PCI_DEV_WAIT_FLR, PCIE_RESET_READY_POLL_MS); > } > EXPORT_SYMBOL_GPL(pcie_flr); > > @@ -4603,7 +4612,7 @@ static int pci_af_flr(struct pci_dev *dev, bool probe) > */ > msleep(100); > > - return pci_dev_wait(dev, "AF_FLR", PCIE_RESET_READY_POLL_MS); > + return pci_dev_wait(dev, PCI_DEV_WAIT_AF_FLR, PCIE_RESET_READY_POLL_MS); > } > > /** > @@ -4648,7 +4657,7 @@ static int pci_pm_reset(struct pci_dev *dev, bool probe) > pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); > pci_dev_d3_sleep(dev); > > - return pci_dev_wait(dev, "PM D3hot->D0", PCIE_RESET_READY_POLL_MS); > + return pci_dev_wait(dev, PCI_DEV_WAIT_D3HOT_D0, PCIE_RESET_READY_POLL_MS); > } > > /** > @@ -4822,7 +4831,7 @@ static int pci_bus_max_d3cold_delay(const struct pci_bus *bus) > * Return 0 on success or -ENOTTY if the first device on the secondary bus > * failed to become accessible. > */ > -int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, char *reset_type) > +int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, enum pci_reset_type reset_type) > { > struct pci_dev *child __free(pci_dev_put) = NULL; > int delay; > @@ -4959,7 +4968,7 @@ int pci_bridge_secondary_bus_reset(struct pci_dev *dev) > __builtin_return_address(0)); > pcibios_reset_secondary_bus(dev); > > - return pci_bridge_wait_for_secondary_bus(dev, "bus reset"); > + return pci_bridge_wait_for_secondary_bus(dev, PCI_DEV_WAIT_BUS_RESET); > } > EXPORT_SYMBOL_GPL(pci_bridge_secondary_bus_reset); > > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h > index 79c8398f39384..477257e843952 100644 > --- a/drivers/pci/pci.h > +++ b/drivers/pci/pci.h > @@ -4,6 +4,15 @@ > > #include <linux/pci.h> > > +enum pci_reset_type { > + PCI_DEV_WAIT_FLR, > + PCI_DEV_WAIT_AF_FLR, > + PCI_DEV_WAIT_D3HOT_D0, > + PCI_DEV_WAIT_BUS_RESET, > + PCI_DEV_WAIT_RESUME, > + PCI_DEV_WAIT_DPC, > +}; > + > /* Number of possible devfns: 0.0 to 1f.7 inclusive */ > #define MAX_NR_DEVFNS 256 > > @@ -137,7 +146,7 @@ void pci_msi_init(struct pci_dev *dev); > void pci_msix_init(struct pci_dev *dev); > bool pci_bridge_d3_possible(struct pci_dev *dev); > void pci_bridge_d3_update(struct pci_dev *dev); > -int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, char *reset_type); > +int pci_bridge_wait_for_secondary_bus(struct pci_dev *dev, enum pci_reset_type reset_type); > > static inline void pci_wakeup_event(struct pci_dev *dev) > { > diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c > index 2b6ef7efa3c11..95cd985244729 100644 > --- a/drivers/pci/pcie/dpc.c > +++ b/drivers/pci/pcie/dpc.c > @@ -174,7 +174,7 @@ pci_ers_result_t dpc_reset_link(struct pci_dev *pdev) > pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS, > PCI_EXP_DPC_STATUS_TRIGGER); > > - if (pci_bridge_wait_for_secondary_bus(pdev, "DPC")) { > + if (pci_bridge_wait_for_secondary_bus(pdev, PCI_DEV_WAIT_DPC)) { > clear_bit(PCI_DPC_RECOVERED, &pdev->priv_flags); > ret = PCI_ERS_RESULT_DISCONNECT; > } else { >