RE: Question on clear_tt_buffer for not TDI but with built-in TT

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Hi, Alan,
 
> > I see. However, for EHCI controller that has TT built in, sending
> > clear_tt_buffer there will be handled by our host controller and TT.
Is
> > it possible to send this clear_tt_buffer to the root hub, as from
> > software to the hardware? It will not go to the bus because it will
be
> > exchanged between the root hub and TT. If this breaks other TDI-type
> > designs, can we use a special flag?
> 
> Sure, we will need to modify ehci_clear_tt_buffer() in ehci-q.c.  The
> problem is to figure out a way to do it that will work with all the
> different types of controllers with built-in TTs.
> 
> For instance, the datasheet for the Freescale MCIMX31 and MCIMX31L
> processors lists an ASYNCTTSTS register at offset 0x15c but leaves it
> out of the discussion of operational registers.  There's no way to
> know if this register works or how to use it.
> 
> The datasheet for the Freescale MPC8349EA processor lists the same
> register and explains how it works.
> 
> The datasheet for Intel's IXP45X and IXP46X processors doesn't even
> list an ASYNCTTSTS register.  Goodness knows how they manage their TT
> buffers.

And, for Xilinx's EHCI host controller with built-in TT, we do not have
any registers for special management of TT buffers. Since Xilinx's EHCI
host controller can be configured as HS only or HS/FS (which will have
TT), so we have a flag to show whether TT is in the hardware or not.
Software therefore can set the has_tt flag. In hardware, the host
controller is also aware of whether TT is built in. In the case when TT
is there, and if the directly connected device is FS (which enables TT),
then traffic is filtered by the TT. In the case if the HS control
transfer is a clear_tt_buffer, TT will clear its TT buffers.

I wonder whether it is possible to add in a flag, such as
tt_support_clear_tt_buffer, which is default to be off. And if it is on,
then clear_tt_buffer can be sent to the root hub?

> Alan Stern
> 

Thanks,
Julie.

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