Re: dwc2: usb: Unable to clear channel error

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On 10/19/2017 5:35 PM, Dinh Nguyen wrote:
> 
> 
> On 10/19/2017 06:55 AM, Grigor Tovmasyan wrote:
>> On 10/18/2017 6:07 PM, Marek Vasut wrote:
>>> On 10/18/2017 04:05 PM, Dinh Nguyen wrote:
>>>> Hi,
>>>>
>>>> I'm trying to bringup the DWC2 USB IP version 330A on a new Stratix10
>>>> SoC and have encountered this error in both Linux and U-Boot:
>>>>
>>>> U-Boot(version v2017.09)
>>>>
>>>> # usb start
>>>> starting USB...
>>>> USB0:   Core Release: 3.30a
>>>> dwc_otg_core_host_init: Timeout!
>>>> dwc_otg_core_host_init: Timeout!
>>>>
>>>> Linux(kernel v4.13)
>>>>
>>>> [    1.299891] dwc2 ffb00000.usb: DWC OTG Controller
>>>> [    1.304628] dwc2 ffb00000.usb: new USB bus registered, assigned bus
>>>> number 1
>>>> [    1.311698] dwc2 ffb00000.usb: irq 13, io mem 0xffb00000
>>>> [    1.318309] dwc2 ffb00000.usb: Unable to clear enable on channel 0
>>>> [    1.325749] dwc2 ffb00000.usb: Unable to clear enable on channel 1
>>>> [    1.333187] dwc2 ffb00000.usb: Unable to clear enable on channel 2
>>>> [    1.340626] dwc2 ffb00000.usb: Unable to clear enable on channel 3
>>>> [    1.348064] dwc2 ffb00000.usb: Unable to clear enable on channel 4
>>>> [    1.355503] dwc2 ffb00000.usb: Unable to clear enable on channel 5
>>>> [    1.362941] dwc2 ffb00000.usb: Unable to clear enable on channel 6
>>>> [    1.370379] dwc2 ffb00000.usb: Unable to clear enable on channel 7
>>>> [    1.377818] dwc2 ffb00000.usb: Unable to clear enable on channel 8
>>>> [    1.385256] dwc2 ffb00000.usb: Unable to clear enable on channel 9
>>>> [    1.392694] dwc2 ffb00000.usb: Unable to clear enable on channel 10
>>>> [    1.400218] dwc2 ffb00000.usb: Unable to clear enable on channel 11
>>>> [    1.407743] dwc2 ffb00000.usb: Unable to clear enable on channel 12
>>>> [    1.415269] dwc2 ffb00000.usb: Unable to clear enable on channel 13
>>>> [    1.422794] dwc2 ffb00000.usb: Unable to clear enable on channel 14
>>>>
>>>> Just wondering if anyone might have an idea on what could be causing
>>>> this error?
>>>
>>> Maybe some clock are not enabled ?
>>>
>>
>> Hi ,
>>
>> Are you following board/hisilicon/hikey/README file instructions when
>> using U-Boot? Specially paragraph FLASHING point 4, where discussed
>> "dwc_otg_core_host_init: Timeout!" message.
>>
> 
> I saw that, but I don't know how that applies to a Stratix10 platform?
> 
> Dinh
> 
> 
Hi,

Did you able to resolve this issue? If not, please provide verbose debug 
log and register dump.

Thanks,
Minas

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