RE: pxa27x_udc and pxa3xx compatibility

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Hi Robert,

AFAIK, the pxa3xx UDC is merely a bug-fixed version of pxa27x UDC,
including DMA request to channel map registers (DRCMRxx). So go on
with your excellent work to add DMA support.

PS: the DRCMRxx register definitions are now moved into dma.h, and
simplified to DRCMR(xx) macros _only_, previous DRCMRxx or DRCMRXXXX
are no longer valid.

Thanks
- eric

> -----Original Message-----
> From: Robert Jarzmik [mailto:robert.jarzmik@xxxxxxx]
> Sent: 2009年3月9日 1:20
> To: Eric Miao; aric@xxxxxxxxxxxxxx
> Cc: linux-usb@xxxxxxxxxxxxxxx; David Brownell
> Subject: pxa27x_udc and pxa3xx compatibility
>
>
> Hi Eric,
>
> Aric came up with a little patch (joined at bottom) to make pxa27x_udc work
> on a
> pxa320 platform.
>
> As you may know, I have no access to the pxa320 developer's manual. Do you
> have
> a way to ask at Marvell if both pxa27x and pxa3xx share the same interface
> towards the USB Client (UDC), and at least that the pxa27x specification is
> valid for a pxa3xx ? And as I'm planning a little extension towards DMA
> support,
> is there something I should know before I begin so that pxa3xx support comes
> "naturally" ?
>
> From experimentation, Aric reports that pxa27x_udc does work, even the parts
> (like RNDIS) which didn't work previously due to buggy pxa27x silicon.
>
> Cheers.
>
> --
> Robert
>
> PS: Aric, would you retest that patch, as I transformed "a bit" your
> original
> work, and confirm your "Signed-off-by" stills holds for that patch please ?
>
> From c225a9dcca4523e9d769bd8a6b1e110b57c77521 Mon Sep 17 00:00:00 2001
> From: Aric Blumer <aric@xxxxxxxxxxxxxx>
> Date: Sat, 7 Mar 2009 18:36:07 +0100
> Subject: [PATCH] pxa27x_udc: compatibility with pxa320 SoC
>
> Got pxa27x_udc working on the pxa320 Nomad platform.  The
> problem was that the pxa3xx UDC is not quite compatible with
> the pxa27x UDC in how it handles back-to-back control
> packets.  The pxa27x probably drops them by default, but the
> pxa320 does not, and you have to detect it and set the OPC
> bit to clear the zero-length packet.
>
> Signed-off-by: Aric Blumer <aric@xxxxxxxxxxxxxx>
> Signed-off-by: Robert Jarzmik <robert.jarzmik@xxxxxxx>
> ---
>  drivers/usb/gadget/Kconfig      |    2 +-
>  drivers/usb/gadget/pxa27x_udc.c |   20 +++++++++++++++++++-
>  2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
> index e55fef5..4e298b3 100644
> --- a/drivers/usb/gadget/Kconfig
> +++ b/drivers/usb/gadget/Kconfig
> @@ -253,7 +253,7 @@ config USB_PXA25X_SMALL
>
>  config USB_GADGET_PXA27X
>         boolean "PXA 27x"
> -       depends on ARCH_PXA && PXA27x
> +       depends on ARCH_PXA && (PXA27x || PXA3xx)
>         help
>            Intel's PXA 27x series XScale ARM v5TE processors include
>            an integrated full speed USB 1.1 device controller.
> diff --git a/drivers/usb/gadget/pxa27x_udc.c
> b/drivers/usb/gadget/pxa27x_udc.c
> index 990f40f..121dae6 100644
> --- a/drivers/usb/gadget/pxa27x_udc.c
> +++ b/drivers/usb/gadget/pxa27x_udc.c
> @@ -37,7 +37,10 @@
>  #include <linux/usb.h>
>  #include <linux/usb/ch9.h>
>  #include <linux/usb/gadget.h>
> +
> +#ifdef CONFIG_PXA2xx
>  #include <mach/pxa2xx-regs.h> /* FIXME: for PSSR */
> +#endif
>  #include <mach/udc.h>
>
>  #include "pxa27x_udc.h"
> @@ -1729,6 +1732,17 @@ static void handle_ep0_ctrl_req(struct pxa_udc *udc,
>
>         nuke(ep, -EPROTO);
>
> +       /*
> +        * In the PXA320 manual, in the section about Back-to-Back setup
> +        * packets, it describes this situation.  The solution is to set OPC
> to
> +        * get rid of the status packet, and then continue with the setup
> +        * packet.
> +        */
> +       if (cpu_is_pxa3xx()) {
> +               if (!ep_is_empty(ep) && (ep_count_bytes_remain(ep) == 0))
> +               udc_ep_writel(ep, UDCCSR, UDCCSR0_OPC);
> +       }
> +
>         /* read SETUP packet */
>         for (i = 0; i < 2; i++) {
>                 if (unlikely(ep_is_empty(ep)))
> @@ -1802,6 +1816,8 @@ stall:
>   *     cleared by software.
>   *   - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do
> it
>   *     before reading ep0.
> + *     This is true only for PXA27x. This is not true anymore for PXA3xx
> family
> + *     (check Back-to-Back setup packet in developers guide).
>   *   - irq can be called on a "packet complete" event (opc_irq=1), while
>   *     UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
>   *     from experimentation).
> @@ -2356,8 +2372,10 @@ static int pxa_udc_resume(struct platform_device
> *_dev)
>          * Software must configure the USB OTG pad, UDC, and UHC
>          * to the state they were in before entering sleep mode.
>          */
> +#ifdef CONFIG_PXA2xx
>         if (cpu_is_pxa27x())
>                 PSSR |= PSSR_OTGPH;
> +#endif
>
>         return 0;
>  }
> @@ -2381,7 +2399,7 @@ static struct platform_driver udc_driver = {
>
>  static int __init udc_init(void)
>  {
> -       if (!cpu_is_pxa27x())
> +       if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
>                 return -ENODEV;
>
>         printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
> --
> 1.5.6.5

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