Hello Wolfgang!
USB Flash drive is working OK
May I ask you which bus timing you are using?
I found I have to use a very SLOW timing, else the readout of qh information
is buggy for me.
There are some registers which have a timing period of 195 ns. I have found no
special treatment in the driver to handle this timing requirement. And I have
found no statement from NXP weather this requirement also exists between the
two halves of a 2x16 bit access.....
Can you check with maximum slow bus timing?
I have 500MHz CPU, 100MHz System clock,
and the following config for banks:
#
# EBIU_AMBCTL Control
#
CONFIG_BANK_0=0x7BB0
CONFIG_BANK_1=0x7BB0
CONFIG_BANK_2=0x7BB0
CONFIG_BANK_3=0x7BB0
Regards,
Ivan
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