On 24.08.2018 11:45, Peter Geis wrote: > If no other users are taking control of the plld, couldn't he just use assign > clocks to set up the clock in the device tree? Yes, but then you need to know that disp clock is running off the pll_d. Also exclusive ownership over the parent clock shall be declared to make sure that nothing else will change the parents clock rate. I'll try to make a draft patch. Again, ideally displays shouldn't be tied to a particular clock on Tegra20. I think for now allowance to change the parent rate if that parent is pll_d should be a reasonable stopgap solution.
