Re: [PATCH 1/2] clk: tegra30: init PLL_C to sane rate

[Thierry Reding <thierry.reding@xxxxxxxxx>]

On Mon, Feb 29, 2016 at 09:46:06PM +0100, Lucas Stach wrote:
> If the bootloader does not touch PLL_C it will stay in its reset
> state, failing to lock when enabled. This leads to consumers of
> this clock to fail probing. Fix this by always programming the
> PLL with a sane rate, which allows it to lock, at startup.
> 
> Signed-off-by: Lucas Stach <dev@xxxxxxxxxx>
> ---
>  drivers/clk/tegra/clk-tegra30.c | 1 +
>  1 file changed, 1 insertion(+)

Applied, thanks.

Thierry

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