Re: [PATCH 5/8] of: Add Tegra124 EMC bindings

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On 07/31/2014 05:05 AM, Mikko Perttunen wrote:
On 31/07/14 13:48, Mikko Perttunen wrote:

I see that the TRM implies the whole 4-bit field is RAM code, rather
than there being 2 separate 2-bit fields for RAM code and boot device
code. Can you please file a bug against the TRM to document this
correctly? (The details of which bits are which are visible on the
Jetson TK1 schematics for example).

Yes, I'll file a bug.

On a closer look, the downstream kernel has been recently updated to
consider the whole 4 bits the ram code. The relevant bug also has a
comment mentioning that starting from T124, the whole 4 bits is
considered the RAM code.

That's odd. Given the structure of the BCT hasn't change, I suspect that's a documentation bug that's propagated elsewhere. Can you send me the bug number internally, and I'll take a look? Thanks.
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