Re: [PATCH 5/8] of: Add Tegra124 EMC bindings

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On 29/07/14 18:49, Stephen Warren wrote:
On 07/29/2014 02:30 AM, Mikko Perttunen wrote:
Looks like the TRM doesn't document this either. I'll add an option
("nvidia,short-ram-code" ?) for the next version.

Using the 2-bit RAM code field as the RAM code is normal operation, so I
wouldn't call this "short".

Using the 2-bit boot device code field as extra RAM code bits is
non-standard.

I would suggest nvidia,use-4-bit-ram-code or
nvidia,use-boot-device-code-as-ram-code-msbs(!) as the property.

Sure.


I see that the TRM implies the whole 4-bit field is RAM code, rather
than there being 2 separate 2-bit fields for RAM code and boot device
code. Can you please file a bug against the TRM to document this
correctly? (The details of which bits are which are visible on the
Jetson TK1 schematics for example).

Yes, I'll file a bug.

- Mikko
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