Re: High CPU load when using MAX14830 SPI UART controller

[Andy Shevchenko <andy.shevchenko@xxxxxxxxx>]

On Tue, Jul 21, 2020 at 5:32 PM Jan Kundrát <jan.kundrat@xxxxxxxxx> wrote:

> I have no code, but according to the datasheet, it's the "RTimeout" bit
> (Line Status Register, bit 0). If properly configured (RxTimeOut set and
> the interrupt routing enabled via LSRIntEn[0], the "RTimeoutIEn" bit),
> we're supposed to get ISR[0] set upon this timeout.

And usually timeout condition means no data for the time equal to
receive 4 more words at given baudrate and bits.
(For 8-bit words on 115200 it will be time as 10*4 / 115200 ~= 360us)

-- 
With Best Regards,
Andy Shevchenko