Re: How to handle SPI components requiring heading/leading clock cycles with CS off

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On Tue, Aug 23, 2016 at 06:10:48PM +0200, Christophe Leroy wrote:

> The only way I see to achieve that is to transfer a 4 bits word with CS off
> before and after the data.
> I've not found any way to do so in the current SPI subsystem implementation,
> is there any ?
> If not, what would be the best approach to implement that ?

If you leave the device with cs_change set so the chip select is low it
should do the right thing after the first message, though obviously you
won't be able to share the chip select then.

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