Re: [PATCH 2/2] spi: cadence: Fix 3-to-8 mux mode

[Harini Katakam <harinikatakamlinux@xxxxxxxxx>]

On Thu, Nov 27, 2014 at 8:42 PM, Lars-Peter Clausen <lars@xxxxxxxxxx> wrote:
> In 3-to-8 mux mode for the CS pins we need to set the PERI_SEL bit in the
> control register. Currently the driver never sets this bit even when
> configured for 3-to-8 mux mode. This patch adds code which sets the bit
> during device initialization when necessary.
>
> Signed-off-by: Lars-Peter Clausen <lars@xxxxxxxxxx>

Acked-by: Harini Katakam <harinik@xxxxxxxxxx>

Regards,
Harini
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