Re: [PATCH v2 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk

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On Mon, Oct 21, 2024 at 01:17:55PM +0300, Ilpo Järvinen wrote:
> On Mon, 21 Oct 2024, Inochi Amaoto wrote:
> > On Mon, Oct 21, 2024 at 11:52:38AM +0300, Ilpo Järvinen wrote:
> > > On Mon, 21 Oct 2024, Inochi Amaoto wrote:

> > > > SG2044 relys on an internal divisor when calculating bitrate, which
> > > > means a wrong clock for the most common bitrates. So add a quirk for
> > > > this uart device to skip the set rate call and only relys on the
> > > > internal UART divisor.
> > > > 
> > > > Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxx>
> > > 
> > > Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx>
> > > 
> > > I wonder though does this mean the numbers userspace can read from kernel 
> > > are bogus and if something can be done about that?
> > 
> > I am not sure whether the clock rate can be read by the userspace.
> > At least it report the right baud speed by using stty.
> 
> Okay, I meant baud & other settings. Thanks for checking it.

oBut there is clock rate for user space. I think Ilpo has a point.

Documentation/ABI/testing/sysfs-tty:21:What:            /sys/class/tty/ttyS<x>/uartclk

-- 
With Best Regards,
Andy Shevchenko






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