UART in FSD SoC has fifosize of 64 bytes. Set fifosize as 64 bytes for UART from Device Tree. Signed-off-by: Tamseel Shams <m.shams@xxxxxxxxxxx> --- arch/arm64/boot/dts/tesla/fsd.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index aaffb50b8b60..047a83cee603 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -601,6 +601,7 @@ clocks = <&clock_peric PERIC_PCLK_UART0>, <&clock_peric PERIC_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; status = "disabled"; }; @@ -613,6 +614,7 @@ clocks = <&clock_peric PERIC_PCLK_UART1>, <&clock_peric PERIC_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; + samsung,uart-fifosize = <64>; status = "disabled"; }; -- 2.17.1
