Sorry, please ignore this patch, will send another patch to fix the lpuart break issue.
Best Regards
Sherry
> -----Original Message-----
> From: Sherry Sun
> Sent: 2023年5月16日 18:16
> To: gregkh@xxxxxxxxxxxxxxxxxxx; jirislaby@xxxxxxxxxx
> Cc: linux-serial@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; dl-linux-imx
> <linux-imx@xxxxxxx>
> Subject: [PATCH] tty: serial: fsl_lpuart: make sure to turn off break before
> enabling CTS
>
> Due to one LPUART IP bug which treat the CTS as higher priority than the
> break signal, that cause the break signal sending through UARTCTRL_SBK may
> impacted by the CTS input if the HW flow control is enabled.
>
> So commit c4c81db5cf8b ("tty: serial: fsl_lpuart: disable the CTS when send
> break signal") try to workaround this IP issue, it disables CTS before asserting
> SBK to avoid any interference from CTS, and re-enable it when break off.
>
> Here we enable CTS before turning off the break, there is still a risk of the
> break signal been impacted by CTS input. The correct sequence is to disable
> CTS before asserting SBK, and re-enable CTS after break off, which ensures
> the break signal won't be impacted by CTS, so fix it.
>
> Fixes: c4c81db5cf8b ("tty: serial: fsl_lpuart: disable the CTS when send break
> signal")
> Signed-off-by: Sherry Sun <sherry.sun@xxxxxxx>
> ---
> drivers/tty/serial/fsl_lpuart.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
> index 0e56fa64b4ce..d9e46f7b80e5 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -1550,20 +1550,19 @@ static void lpuart32_break_ctl(struct uart_port
> *port, int break_state)
> modem = lpuart32_read(port, UARTMODIR);
>
> if (break_state != 0) {
> - temp |= UARTCTRL_SBK;
> /*
> * LPUART CTS has higher priority than SBK, need to disable
> CTS before
> * asserting SBK to avoid any interference if flow control is
> enabled.
> */
> if (cflag & CRTSCTS && modem & UARTMODIR_TXCTSE)
> lpuart32_write(port, modem &
> ~UARTMODIR_TXCTSE, UARTMODIR);
> + lpuart32_write(port, temp | UARTCTRL_SBK, UARTCTRL);
> } else {
> - /* Re-enable the CTS when break off. */
> + lpuart32_write(port, temp, UARTCTRL);
> + /* Re-enable the CTS after break off. */
> if (cflag & CRTSCTS && !(modem & UARTMODIR_TXCTSE))
> lpuart32_write(port, modem | UARTMODIR_TXCTSE,
> UARTMODIR);
> }
> -
> - lpuart32_write(port, temp, UARTCTRL);
> }
>
> static void lpuart_setup_watermark(struct lpuart_port *sport)
> --
> 2.17.1
