[tty:tty-next 10/67] drivers/tty/serial/8250/8250_omap.c:825 omap8250_rs485_config() warn: bitwise AND condition is false here

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tree:   https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-next
head:   15730dc45dc7432713c7af9ee5abad76872f6405
commit: 801954d1210a89b767176e1e34cf5976f41ca6d3 [10/67] serial: 8250: 8250_omap: Support native RS485
config: nios2-randconfig-m041-20221106
compiler: nios2-linux-gcc (GCC) 12.1.0

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Reported-by: Dan Carpenter <error27@xxxxxxxxx>

New smatch warnings:
drivers/tty/serial/8250/8250_omap.c:825 omap8250_rs485_config() warn: bitwise AND condition is false here

Old smatch warnings:
arch/nios2/include/asm/thread_info.h:62 current_thread_info() error: uninitialized symbol 'sp'.

vim +825 drivers/tty/serial/8250/8250_omap.c

801954d1210a89 Lukas Wunner              2022-10-16  805  static int omap8250_rs485_config(struct uart_port *port,
801954d1210a89 Lukas Wunner              2022-10-16  806  				 struct ktermios *termios,
801954d1210a89 Lukas Wunner              2022-10-16  807  				 struct serial_rs485 *rs485)
801954d1210a89 Lukas Wunner              2022-10-16  808  {
801954d1210a89 Lukas Wunner              2022-10-16  809  	struct omap8250_priv *priv = port->private_data;
801954d1210a89 Lukas Wunner              2022-10-16  810  	struct uart_8250_port *up = up_to_u8250p(port);
801954d1210a89 Lukas Wunner              2022-10-16  811  	u32 fixed_delay_rts_before_send = 0;
801954d1210a89 Lukas Wunner              2022-10-16  812  	u32 fixed_delay_rts_after_send = 0;
801954d1210a89 Lukas Wunner              2022-10-16  813  	unsigned int baud;
801954d1210a89 Lukas Wunner              2022-10-16  814  
801954d1210a89 Lukas Wunner              2022-10-16  815  	/*
801954d1210a89 Lukas Wunner              2022-10-16  816  	 * There is a fixed delay of 3 bit clock cycles after the TX shift
801954d1210a89 Lukas Wunner              2022-10-16  817  	 * register is going empty to allow time for the stop bit to transition
801954d1210a89 Lukas Wunner              2022-10-16  818  	 * through the transceiver before direction is changed to receive.
801954d1210a89 Lukas Wunner              2022-10-16  819  	 *
801954d1210a89 Lukas Wunner              2022-10-16  820  	 * Additionally there appears to be a 1 bit clock delay between writing
801954d1210a89 Lukas Wunner              2022-10-16  821  	 * to the THR register and transmission of the start bit, per page 8783
801954d1210a89 Lukas Wunner              2022-10-16  822  	 * of the AM65 TRM:  https://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
801954d1210a89 Lukas Wunner              2022-10-16  823  	 */
801954d1210a89 Lukas Wunner              2022-10-16  824  	if (priv->quot) {
801954d1210a89 Lukas Wunner              2022-10-16 @825  		if (priv->mdr1 & UART_OMAP_MDR1_16X_MODE)

This should be:

	if (priv->mdr1 == UART_OMAP_MDR1_16X_MODE)

801954d1210a89 Lukas Wunner              2022-10-16  826  			baud = port->uartclk / (16 * priv->quot);
801954d1210a89 Lukas Wunner              2022-10-16  827  		else
801954d1210a89 Lukas Wunner              2022-10-16  828  			baud = port->uartclk / (13 * priv->quot);
801954d1210a89 Lukas Wunner              2022-10-16  829  
801954d1210a89 Lukas Wunner              2022-10-16  830  		fixed_delay_rts_after_send  = 3 * MSEC_PER_SEC / baud;
801954d1210a89 Lukas Wunner              2022-10-16  831  		fixed_delay_rts_before_send = 1 * MSEC_PER_SEC / baud;
801954d1210a89 Lukas Wunner              2022-10-16  832  	}
801954d1210a89 Lukas Wunner              2022-10-16  833  
801954d1210a89 Lukas Wunner              2022-10-16  834  	/*
801954d1210a89 Lukas Wunner              2022-10-16  835  	 * Fall back to RS485 software emulation if the UART is missing
801954d1210a89 Lukas Wunner              2022-10-16  836  	 * hardware support, if the device tree specifies an mctrl_gpio
801954d1210a89 Lukas Wunner              2022-10-16  837  	 * (indicates that RTS is unavailable due to a pinmux conflict)
801954d1210a89 Lukas Wunner              2022-10-16  838  	 * or if the requested delays exceed the fixed hardware delays.
801954d1210a89 Lukas Wunner              2022-10-16  839  	 */
801954d1210a89 Lukas Wunner              2022-10-16  840  	if (!(priv->habit & UART_HAS_NATIVE_RS485) ||
801954d1210a89 Lukas Wunner              2022-10-16  841  	    mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS) ||
801954d1210a89 Lukas Wunner              2022-10-16  842  	    rs485->delay_rts_after_send  > fixed_delay_rts_after_send ||
801954d1210a89 Lukas Wunner              2022-10-16  843  	    rs485->delay_rts_before_send > fixed_delay_rts_before_send) {
801954d1210a89 Lukas Wunner              2022-10-16  844  		priv->mdr3 &= ~UART_OMAP_MDR3_DIR_EN;
801954d1210a89 Lukas Wunner              2022-10-16  845  		serial_out(up, UART_OMAP_MDR3, priv->mdr3);
801954d1210a89 Lukas Wunner              2022-10-16  846  
801954d1210a89 Lukas Wunner              2022-10-16  847  		port->rs485_config = serial8250_em485_config;
801954d1210a89 Lukas Wunner              2022-10-16  848  		return serial8250_em485_config(port, termios, rs485);
801954d1210a89 Lukas Wunner              2022-10-16  849  	}
801954d1210a89 Lukas Wunner              2022-10-16  850  
801954d1210a89 Lukas Wunner              2022-10-16  851  	rs485->delay_rts_after_send  = fixed_delay_rts_after_send;
801954d1210a89 Lukas Wunner              2022-10-16  852  	rs485->delay_rts_before_send = fixed_delay_rts_before_send;
801954d1210a89 Lukas Wunner              2022-10-16  853  
801954d1210a89 Lukas Wunner              2022-10-16  854  	if (rs485->flags & SER_RS485_ENABLED)
801954d1210a89 Lukas Wunner              2022-10-16  855  		priv->mdr3 |= UART_OMAP_MDR3_DIR_EN;
801954d1210a89 Lukas Wunner              2022-10-16  856  	else
801954d1210a89 Lukas Wunner              2022-10-16  857  		priv->mdr3 &= ~UART_OMAP_MDR3_DIR_EN;
801954d1210a89 Lukas Wunner              2022-10-16  858  
801954d1210a89 Lukas Wunner              2022-10-16  859  	/*
801954d1210a89 Lukas Wunner              2022-10-16  860  	 * Retain same polarity semantics as RS485 software emulation,
801954d1210a89 Lukas Wunner              2022-10-16  861  	 * i.e. SER_RS485_RTS_ON_SEND means driving RTS low on send.
801954d1210a89 Lukas Wunner              2022-10-16  862  	 */
801954d1210a89 Lukas Wunner              2022-10-16  863  	if (rs485->flags & SER_RS485_RTS_ON_SEND)
801954d1210a89 Lukas Wunner              2022-10-16  864  		priv->mdr3 &= ~UART_OMAP_MDR3_DIR_POL;
801954d1210a89 Lukas Wunner              2022-10-16  865  	else
801954d1210a89 Lukas Wunner              2022-10-16  866  		priv->mdr3 |= UART_OMAP_MDR3_DIR_POL;
801954d1210a89 Lukas Wunner              2022-10-16  867  
801954d1210a89 Lukas Wunner              2022-10-16  868  	serial_out(up, UART_OMAP_MDR3, priv->mdr3);
801954d1210a89 Lukas Wunner              2022-10-16  869  
801954d1210a89 Lukas Wunner              2022-10-16  870  	return 0;
801954d1210a89 Lukas Wunner              2022-10-16  871  }

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