Re: [PATCH 12/15] clk: renesas: rcar-gen4: Add CLK_TYPE_GEN4_PLL4

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi Shimoda-san,

On Wed, Apr 20, 2022 at 10:43 AM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@xxxxxxxxxxx> wrote:
> R-Car V4H (r8a779g0) has PLL4 so that add CLK_TYPE_GEN4_PLL4.
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>

Thanks for your patch!

> ---
>  drivers/clk/renesas/r8a779f0-cpg-mssr.c | 18 +++++++++---------
>  drivers/clk/renesas/rcar-gen4-cpg.c     |  5 +++++
>  drivers/clk/renesas/rcar-gen4-cpg.h     |  3 +++
>  3 files changed, 17 insertions(+), 9 deletions(-)

You forgot to update drivers/clk/renesas/r8a779a0-cpg-mssr.c.
Hence all clocks derived from PLL5 have a zero rate, causing the
SDHI driver to enter an infinite loop in renesas_sdhi_set_clock()
(clock = 0):

        for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
                clock <<= 1;

Adding the missing PLL4 mul/div columns fixes that.

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



[Index of Archives]     [Kernel Newbies]     [Security]     [Netfilter]     [Bugtraq]     [Linux PPP]     [Linux FS]     [Yosemite News]     [MIPS Linux]     [ARM Linux]     [Linux Security]     [Linux RAID]     [Samba]     [Video 4 Linux]     [Linmodem]     [Device Mapper]     [Linux Kernel for ARM]

  Powered by Linux