On Wed, 2021-09-29 at 19:48 +0300, Andy Shevchenko wrote: > [Some people who received this message don't often get email from > andriy.shevchenko@xxxxxxxxxxxxxxx. Learn why this is important at > http://aka.ms/LearnAboutSenderIdentification.] > > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > On Wed, Sep 29, 2021 at 05:00:46PM +0530, LakshmiPraveen Kopparthi > wrote: > > PCI1XXXX UART is a PCIe to UART module. It has 5 SKUs, each is > > differentiated by the device IDs in the PCIe config space. Each > > SKU supports a maximum of 4 UART ports(UART0,1,2,3) with fixed > > offests.Based on the sub device ID, the combinations of UART > > ports shall be enumerated. > > > > The UART port is compatible with the standard 16550A, but has some > > modifications.The modifications includes a change in the baud rate > > settings,auto control of RTS signal for RS485 feature and an > > increase of TX & RX FIFO size to 256 Bytes.Also, it has a > > capability > > to wake up the CPU. > > > > These patches adds the support to enumerate and exercise all the > > combinations of UART ports in all the SKUs. > > drivers/tty/serial/8250/8250_pci.c | 384 > > ++++++++++++++++++++++++++++ > > Please, do not add this to 8250_pci.c. Use separate quirk driver as > it's done > in plenty of examples: > > 8250_lpss.c, 8250_mid.c, 8250_exar.c, ... Thanks for pointing the examples. I have looked into these examples and the required functionality can be achieved with a separate driver. But I would like to know the reason for not adding this to 8250_pci.c. > > -- > With Best Regards, > Andy Shevchenko > >
