On Thu 18 Apr 2019 at 18:04, Atish Patra <atish.patra@xxxxxxx> wrote: > On 4/18/19 4:22 PM, Kevin Hilman wrote: >> Hi Paul, >> >> Paul Walmsley <paul.walmsley@xxxxxxxxxx> writes: >> >>> This series adds a serial driver, with console support, for the >>> UART IP block present on the SiFive FU540 SoC. The programming >>> model is straightforward, but unique. >>> >>> Boot-tested on a SiFive FU540 HiFive-U board, using BBL and the >>> open-source FSBL (with appropriate patches to the DT data). >>> >>> This fifth version fixes a bug in the set_termios handler, >>> found by Andreas Schwab <schwab@xxxxxxx>. >>> >>> The patches in this series can also be found, with the PRCI patches, >>> DT patches, and DT prerequisite patch, at: >>> >>> https://github.com/sifive/riscv-linux/tree/dev/paulw/serial-v5.1-rc4 >> >> I tried this branch, and it doesn't boot on my unleashed board. >> >> Here's the boot log when I pass the DT built from your branch via >> u-boot: https://termbin.com/rfp3. >> > > Unfortunately, that won't work. The current DT modifications by OpenSBI. > > 1. Change hart status to "masked" from "okay". > 2. M-mode interrupt masking in PLIC node. > 3. Add a chosen node for serial access in U-Boot. > > You can ignore 3 for your use case. However, if you pass a dtb built from source > code, that will have hart0 enabled and M-mode interrupts enabled in DT. Atish, I'm trying to get the kernel boot with the current linux kernel DT from Paul's patch series [0]. Could you point me to some documentation on 2. ? Or do you know of a way to disable M-mode interrupts from U-boot ? [0]: https://lore.kernel.org/patchwork/project/lkml/list/?series=390077 Thanks, Loys > > Not sure if we should do these DT modifications in U-Boot as well. >
