Hi Kevin, On Fri, 19 Apr 2019, Kevin Hilman wrote: > Atish Patra <atish.patra@xxxxxxx> writes: > > On 4/18/19 4:22 PM, Kevin Hilman wrote: > >> Paul Walmsley <paul.walmsley@xxxxxxxxxx> writes: > >> > >>> This series adds a serial driver, with console support, for the > >>> UART IP block present on the SiFive FU540 SoC. The programming > >>> model is straightforward, but unique. > >>> > >>> Boot-tested on a SiFive FU540 HiFive-U board, using BBL and the > >>> open-source FSBL (with appropriate patches to the DT data). > >>> > >>> This fifth version fixes a bug in the set_termios handler, > >>> found by Andreas Schwab <schwab@xxxxxxx>. > >>> > >>> The patches in this series can also be found, with the PRCI patches, > >>> DT patches, and DT prerequisite patch, at: > >>> > >>> https://github.com/sifive/riscv-linux/tree/dev/paulw/serial-v5.1-rc4 ... > I've just updated to u-boot master branch with SMP enabled, and build a > new openSBI (also from master branch) with u-boot payload. Using your > v5.1-rc4_unleashed branch, I see 4 CPUs booting: > https://termbin.com/kg13 Now that the serial driver is working for you, care to send a Tested-by: ? thanks, - Paul
