Re: [PATCH 1/6] dt-bindings: soc: qcom: Add interconnect binding for GENI QUP

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On 2019-01-23 17:10, Evan Green wrote:
On Mon, Jan 21, 2019 at 10:34 PM Alok Chauhan <alokc@xxxxxxxxxxxxxx> wrote:

Add documentation for the interconnect and interconnect-names bindings
for the GENI QUP as detailed by bindings/interconnect/interconnect.txt.

Signed-off-by: Alok Chauhan <alokc@xxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
index dab7ca9..44d7e02 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt
@@ -17,6 +17,12 @@ Required properties if child node exists:
 - #address-cells:      Must be <1> for Serial Engine Address
- #size-cells: Must be <1> for Serial Engine Address Size
 - ranges:              Must be present
+- interconnects: phandle to a interconnect provider. Please refer
+                       ../interconnect/interconnect.txt for details.

This path to the interconnect documentation is not correct.
sorry, i will correct this in next patch.
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,a Linux Foundation Collaborative Project



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