On Mon, 2018-07-16 at 14:59 +0100, Sudip Mukherjee wrote: > Hi Andy, > > On 16/07/18 14:35, Andy Shevchenko wrote: > > 8250_port is contaminated with a lot of quirks. Especially when we > > have > > a separate module for Exar chips it seems very logical to more the > > rest of > > the bits there as well. > > > > Just compile tested. I have no hardware to test this approach. > > It would be nice if you guys (Jan, Sudip, anyone else?) can take it > > and > > continue on real hardware. Why am I interested in this? It would > > make my life > > slightly easier for runtime PM support developing for 8250. > > I am traveling this week and will be able to test it on the hardware > on > the weekend (21st and 22nd). Do you have any specific test to run? Since it touches configuration parts and PM it would be nice to test the following: - basic stuff that everything work for you as previously (any of your setup is not broken), or more specific - a) the board is detected correctly (number of ports, type, etc) - b) the fractional divisor works as expected on affected boards (if you supply some baud rate on the board which utilizes fractional part) - c) open, write/read, close, check PM state of the device; repeat few times; it will ensure that sleep works as before -- Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> Intel Finland Oy -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
