Hello everyone,
I am working on a Tango4 SoC, which has the same "weird register layout"
as Au1x00/RT288x UART. The verilog says "The uartcore is compatible with
National 16550D UART", and the doc says "The UART is almost compatible
with National Semiconductor's 16550".
I have a few questions with respect to 8250_core.c
In no particular order:
(I'm having a hard time following the function pointers.)
I don't think serial8250_config_port() calls autoconfig() right?
i.e. I don't think UART_CONFIG_TYPE is set when port->iotype == UPIO_AU
I don't see where port.type is set, and to what (PORT_16550A?)
And how fifo_size and tx_loadsz are set up?
The PORT_16550A entry doesn't set UART_CAP_EFR, yet autoconfig_16550a()
tries to read UART_EFR... how come?
The RT3050 (which is supposed to be compatible with the RT288x?) has
a scratch register. But the au_io_{in,out}_map lookup tables don't
map UART_SCR, and some functions seem to use the scratch register,
such as serial8250_console_write
I'd be grateful to anyone who can clear some/most of my confusion.
Regards.
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