Corrected PATCH sc16is7xx: Fix read/write for secondary

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Sorry, forgot to sign-off the patch


>From 4fcbbac277e0d48a23f78095326b58f1741d1a2b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bo=20Svang=C3=A5rd?= <bo.svangard@xxxxxxxxxxxxxx>
Date: Thu, 26 Feb 2015 12:11:01 +0100
Subject: [PATCH] serial/sc16is7xx: Fix read/write for secondary uart
MIME-Version: 1.0
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Adjust register address to enable reading/writing data to secondary uart port

Signed-off-by: Bo Svangård <bo.svangard@xxxxxxxxxxxxxx>
---
 drivers/tty/serial/sc16is7xx.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index df9a384..99b26f0 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -495,7 +495,8 @@ static void sc16is7xx_handle_rx(struct uart_port *port, unsigned int rxlen,
 			bytes_read = 1;
 		} else {
 			regcache_cache_bypass(s->regmap, true);
-			regmap_raw_read(s->regmap, SC16IS7XX_RHR_REG,
+			regmap_raw_read(s->regmap,
+					SC16IS7XX_RHR_REG << SC16IS7XX_REG_SHIFT | port->line,
 					s->buf, rxlen);
 			regcache_cache_bypass(s->regmap, false);
 			bytes_read = rxlen;
@@ -578,7 +579,9 @@ static void sc16is7xx_handle_tx(struct uart_port *port)
 			xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 		}
 		regcache_cache_bypass(s->regmap, true);
-		regmap_raw_write(s->regmap, SC16IS7XX_THR_REG, s->buf, to_send);
+		regmap_raw_write(s->regmap,
+				 SC16IS7XX_THR_REG << SC16IS7XX_REG_SHIFT | port->line,
+				 s->buf, to_send);
 		regcache_cache_bypass(s->regmap, false);
 	}
 
-- 
1.9.1

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