Re: [PATCH 1/1] tty, serial, 8250: to avoid recv fifo overrun, read rx fifo during xmit

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> This specific hunk is only evaluated if UPF_CONS_FLOW is set;
> currently, there are only 3 in-tree users of UPF_CONS_FLOW and all of them
> are samsung UARTs. Furthermore, UPF_CONS_FLOW cannot be set from userspace
> with ioctl(TIOCSSERIAL).

Now it makes sense.  There were two mistakes I made:
1. When originally writing this, I assumed UPF_CONS_FLOW was actually
   something important, and
2. When responding, I managed to get confused between this and the earlier
   loop (the UPF_CONS_FLOW part didn't make it into the 3 lines of context)
   which *is* the important part.
   
>> If I understand what you mean by "the actual shifter", i.e. the difference
>> between THRE and TEMT, then that's always 8 bits (+ start + stop).

> I doubt that's true for every uart design supported by this driver. But
> I do think the number is small, and I agree that it's almost certainly < 16 bits
> for 16550 work-alikes.

Perhaps I haven't developed the necessary cynicism regarding hardware designers. :-)

A question I might ask you is whether you think it's necessary to wait
for TEMT in serial8250_put_poll_char at all.  Yes, a panic just as
the baud rate is being changed or a break is being sent could mangle
the last character, but such a race is a serious risk of losing those
characters *anyway*.
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