Re: [PATCH V2 06/10] serial: pxa: Add fifo-size and {big,native}-endian properties

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On Wed, 12 Nov 2014 12:54:03 -0800
, Kevin Cernekee <cernekee@xxxxxxxxx>
 wrote:
> With a few tweaks, the PXA serial driver can handle other 16550A clones.
> Add a fifo-size DT property to override the FIFO depth (BCM7xxx uses 32),
> and {native,big}-endian properties similar to regmap to support SoCs that
> have BE or "automagic endian" registers.

Hold the phone, if these are 16550A clone ports, then why is the pxa
driver being adapted to drive them? I would expect the of_serial.c
driver to be used. It's already got support for multiple variants of the
16550.

g.

> 
> Signed-off-by: Kevin Cernekee <cernekee@xxxxxxxxx>
> ---
>  drivers/tty/serial/pxa.c | 18 ++++++++++++++++--
>  1 file changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
> index 21b7d8b..21406dc 100644
> --- a/drivers/tty/serial/pxa.c
> +++ b/drivers/tty/serial/pxa.c
> @@ -60,13 +60,19 @@ struct uart_pxa_port {
>  static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
>  {
>  	offset <<= 2;
> -	return readl(up->port.membase + offset);
> +	if (up->port.iotype == UPIO_MEM32BE)
> +		return ioread32be(up->port.membase + offset);
> +	else
> +		return readl(up->port.membase + offset);
>  }
>  
>  static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
>  {
>  	offset <<= 2;
> -	writel(value, up->port.membase + offset);
> +	if (up->port.iotype == UPIO_MEM32BE)
> +		iowrite32be(value, up->port.membase + offset);
> +	else
> +		writel(value, up->port.membase + offset);
>  }
>  
>  static void serial_pxa_enable_ms(struct uart_port *port)
> @@ -833,6 +839,7 @@ static int serial_pxa_probe_dt(struct platform_device *pdev,
>  {
>  	struct device_node *np = pdev->dev.of_node;
>  	int ret;
> +	u32 val;
>  
>  	if (!np)
>  		return 1;
> @@ -843,6 +850,13 @@ static int serial_pxa_probe_dt(struct platform_device *pdev,
>  		return ret;
>  	}
>  	sport->port.line = ret;
> +
> +	if (of_property_read_u32(np, "fifo-size", &val) == 0)
> +		sport->port.fifosize = val;
> +
> +	sport->port.iotype =
> +		of_device_is_big_endian(np) ? UPIO_MEM32BE : UPIO_MEM32;
> +
>  	return 0;
>  }
>  
> -- 
> 2.1.1
> 

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