Hi! The current sh-sci implementation doesn't exploit the RX FIFOs at all and has the chip issue an interrupt for every byte received. This series implements the necessary changes to improve that. It includes a sysfs interface for changing the FIFO trigger level; there seem to be few drivers that implement something like that (I only found one), so I'd like to know if this implementation is palatable. CU Uli Ulrich Hecht (3): serial: sh-sci: consider DR (data ready) bit adequately serial: sh-sci: exploit RX FIFOs better serial: sh-sci: make RX FIFO trigger tunable via sysfs drivers/tty/serial/sh-sci.c | 113 ++++++++++++++++++++++++++++++++++++++++++-- drivers/tty/serial/sh-sci.h | 5 ++ include/linux/serial_sci.h | 2 + 3 files changed, 116 insertions(+), 4 deletions(-) -- 1.8.4.5 -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
