On Wed, Apr 25, 2012 at 02:26:36PM +0200, Christian Melki wrote: > Hi. > > We noticed that we were loosing data at speed less than 2400 baud. > It turned out our (TI16750 compatible) uart with 64 byte outgoing fifo was truncated to 16 byte (bit 5 sets fifo len) when modifying the fcr reg. > The input code still fills the buffer with 64 bytes if I remember correctly and thus data is lost. > Our fix was to remove whiping of the fcr content and just add the TRIGGER_1 which we want for latency. > I can't see why this would not work on less than 2400 always, for all uarts... > Otherwise one would have to make sure the filling of the fifo re-checks the current state of available fifo size (urrk). Thank you for your fix, but could you take a look at the file, Documentation/SubmittingPatches and resend it with a Signed-off-by: line so that I am able to apply the patch? thanks, greg k-h -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
