Thanks Jinpu for your comments here. Will make the changes in PATCH V2. > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > On Mon, Mar 28, 2022 at 10:42 AM Ajish Koshy > <Ajish.Koshy@xxxxxxxxxxxxx> wrote: > > > > Executing driver on servers with more than 32 CPUs were faced with > > command timeouts. This is because we were not geting completions for > > commands submitted on IQ32 - IQ63. > > > > Set E64Q bit to enable upper inbound and outbound queues 32 to 63 in > > the MPI main configuration table. > > > > Added 500ms delay after successful MPI initialization as mentioned in > > controller datasheet. > > > > Signed-off-by: Ajish Koshy <Ajish.Koshy@xxxxxxxxxxxxx> > > Signed-off-by: Viswas G <Viswas.G@xxxxxxxxxxxxx> > Please add > Fixes: 05c6c029a44d ("scsi: pm80xx: Increase number of supported > queues") so it will pickup > automatically by stable. OK > > > --- > > drivers/scsi/pm8001/pm80xx_hwi.c | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/drivers/scsi/pm8001/pm80xx_hwi.c > > b/drivers/scsi/pm8001/pm80xx_hwi.c > > index b92e82a576e3..f04c6c589615 100644 > > --- a/drivers/scsi/pm8001/pm80xx_hwi.c > > +++ b/drivers/scsi/pm8001/pm80xx_hwi.c > > @@ -766,6 +766,10 @@ static void init_default_table_values(struct > pm8001_hba_info *pm8001_ha) > > pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = > 0x01; > > pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = > 0x01; > > > > + /* Enable higher IQs and OQs, 32 to 63, bit 16*/ > > + if (pm8001_ha->max_q_num > 32) > > + pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= > > + (1 << 16); > > /* Disable end to end CRC checking */ > > pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << > > 16); > > > > @@ -1027,6 +1031,9 @@ static int mpi_init_check(struct > pm8001_hba_info *pm8001_ha) > > if (0x0000 != gst_len_mpistate) > > return -EBUSY; > > > > + /* Wait for 500ms after successful MPI initialization*/ > > + msleep(500); > > + > > return 0; > > } > > > > -- > > 2.31.1 > > Thanks, Ajish