On 20/12/2018 13:38, Marc Gonzalez wrote: > Found something fishy... [ufs_phy_aux_clk rate returned 0] Even with that "fixed" [or rather hacked around, since the syntax of drivers/clk/qcom/gcc-msm8998.c remains nebulous, even after staring at it, literally, for hours] the UFSHC refuses to function. I think I've checked every low-level thingamajig: clocks, regulators, power domains, gdsc, voltage spec UFSPHY is supposed to use vdda-phy-supply = <&vreg_l1a_0p875>; // 0.875 V vdda-pll-supply = <&vreg_l2a_1p2>; // 1.200 V vddp-ref-clk-supply = <&vreg_l26a_1p2>; // 1.200 V vdda-phy-max-microamp = <51400>; vdda-pll-max-microamp = <14600>; vddp-ref-clk-max-microamp = <100>; vddp-ref-clk-always-on; clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_AUX_CLK>; UFSHC is supposed to use /*** vdd-hba-supply = <&gcc UFS_GDSC>; -EPROBE_DEFER ***/ pinctrl-names = "dev-reset-assert", "dev-reset-deassert"; pinctrl-0 = <&ufs_dev_reset_assert>; pinctrl-1 = <&ufs_dev_reset_deassert>; vdd-hba-fixed-regulator; vcc-supply = <&vreg_l20a_2p95>; // 2.950 V vccq-supply = <&vreg_l26a_1p2>; // 1.200 V vccq2-supply = <&vreg_s4a_1p8>; // 1.800 V vcc-max-microamp = <750000>; vccq-max-microamp = <560000>; vccq2-max-microamp = <750000>; clocks = <&gcc GCC_UFS_AXI_CLK>, <&gcc GCC_AGGRE1_UFS_AXI_CLK>, <&gcc GCC_UFS_AHB_CLK>, <&gcc GCC_UFS_UNIPRO_CORE_CLK>, <&gcc GCC_UFS_ICE_CORE_CLK>, <&rpmcc RPM_SMD_LN_BB_CLK1>, <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_1_CLK>; In case anyone spots something fishy, here's my latest boot log: [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x51af8014] [ 0.000000] Linux version 4.20.0-rc4 (mgonzalez@venus) (gcc version 7.3.1 20180425 [linaro-7.3-2018.05 revision d29120a424ecfbc167ef90065c0eeb7f91977701] (Linaro GCC 7.3-2018.05)) #26 SMP PREEMPT Thu Dec 20 15:13:27 CET 2018 [ 0.000000] Machine model: Qualcomm Technologies, Inc. MSM8998 v1 MTP [ 0.000000] printk: debug: ignoring loglevel setting. [ 0.000000] On node 0 totalpages: 1028544 [ 0.000000] DMA32 zone: 8192 pages used for memmap [ 0.000000] DMA32 zone: 0 pages reserved [ 0.000000] DMA32 zone: 511488 pages, LIFO batch:63 [ 0.000000] Normal zone: 8079 pages used for memmap [ 0.000000] Normal zone: 517056 pages, LIFO batch:63 [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.0 [ 0.000000] random: get_random_bytes called from start_kernel+0xb0/0x44c with crng_init=0 [ 0.000000] percpu: Embedded 22 pages/cpu @(____ptrval____) s49816 r8192 d32104 u90112 [ 0.000000] pcpu-alloc: s49816 r8192 d32104 u90112 alloc=22*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [0] 6 [0] 7 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI) [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1012273 [ 0.000000] Kernel command line: console=ttyMSM0,115200,n8 ignore_loglevel trace_event=ufs:*,scsi:*,clk:*,regulator:* tp_printk nosmp clk_ignore_unused pd_ignore_unused androidboot.bootdevice=1da4000.ufshc androidboot.serialno=53733c35 androidboot.baseband=apq mdss_mdp.panel=1:hdmi:16 [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes) [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes) [ 0.000000] software IO TLB: mapped [mem 0xfbfff000-0xfffff000] (64MB) [ 0.000000] Memory: 3962916K/4114176K available (3390K kernel code, 390K rwdata, 1012K rodata, 7232K init, 234K bss, 151260K reserved, 0K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1 [ 0.000000] ftrace: allocating 13115 entries in 52 pages [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=8. [ 0.000000] Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GICv3: Distributor has no Range Selector support [ 0.000000] GICv3: no VLPI support, no direct LPI support [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000017b00000 [ 0.000000] ITS: No ITS available, not enabling LPIs [ 0.000000] arch_timer: cp15 and mmio timer(s) running at 19.20MHz (virt/virt). [ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x46d987e47, max_idle_ns: 440795202767 ns [ 0.000002] sched_clock: 56 bits at 19MHz, resolution 52ns, wraps every 4398046511078ns [ 0.000062] Console: colour dummy device 80x25 [ 0.000082] Calibrating delay loop (skipped), value calculated using timer frequency.. 38.40 BogoMIPS (lpj=76800) [ 0.000090] pid_max: default: 32768 minimum: 301 [ 0.000185] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.000200] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.023908] ASID allocator initialised with 32768 entries [ 0.031906] rcu: Hierarchical SRCU implementation. [ 0.047935] smp: Bringing up secondary CPUs ... [ 0.047941] smp: Brought up 1 node, 1 CPU [ 0.047946] SMP: Total of 1 processors activated. [ 0.047955] CPU features: detected: GIC system register CPU interface [ 0.047961] CPU features: detected: 32-bit EL0 Support [ 0.047968] CPU features: detected: CRC32 instructions [ 0.051373] CPU: All CPU(s) started at EL1 [ 0.051384] alternatives: patching kernel code [ 0.051925] devtmpfs: initialized [ 0.054838] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.054849] futex hash table entries: 2048 (order: 5, 131072 bytes) [ 0.054959] pinctrl core: initialized pinctrl subsystem [ 0.055206] regulator_enable: name=regulator-dummy [ 0.055753] vdso: 2 pages (1 code @ (____ptrval____), 1 data @ (____ptrval____)) [ 0.055835] DMA: preallocated 256 KiB pool for atomic allocations [ 0.058252] clk_prepare: gcc_hmss_dvm_bus_clk [ 0.058260] clk_prepare_complete: gcc_hmss_dvm_bus_clk [ 0.058270] clk_enable: gcc_hmss_dvm_bus_clk [ 0.058283] clk_enable_complete: gcc_hmss_dvm_bus_clk [ 0.058376] clk_prepare: gcc_lpass_at_clk [ 0.058382] clk_prepare_complete: gcc_lpass_at_clk [ 0.058389] clk_enable: gcc_lpass_at_clk [ 0.058399] clk_enable_complete: gcc_lpass_at_clk [ 0.058436] clk_prepare: gcc_mmss_noc_cfg_ahb_clk [ 0.058443] clk_prepare_complete: gcc_mmss_noc_cfg_ahb_clk [ 0.058450] clk_enable: gcc_mmss_noc_cfg_ahb_clk [ 0.058460] clk_enable_complete: gcc_mmss_noc_cfg_ahb_clk [ 0.084372] regulator_enable: name=vph_pwr [ 0.084837] SCSI subsystem initialized [ 0.088187] clocksource: Switched to clocksource arch_sys_counter [ 0.100473] s1: supplied by vph_pwr [ 0.101053] s2: supplied by vph_pwr [ 0.101358] s3: supplied by vph_pwr [ 0.101413] s3: Bringing 0uV into 1352000-1352000uV [ 0.101497] regulator_set_voltage: name=s3 (1352000-1352000) [ 0.104215] regulator_set_voltage_complete: name=s3, val=320000 [ 0.104507] s4: supplied by vph_pwr [ 0.104625] s4: Bringing 0uV into 1800000-1800000uV [ 0.104635] regulator_set_voltage: name=s4 (1800000-1800000) [ 0.105136] regulator_set_voltage_complete: name=s4, val=320000 [ 0.105344] s5: supplied by vph_pwr [ 0.105393] s5: Bringing 0uV into 1904000-1904000uV [ 0.105401] regulator_set_voltage: name=s5 (1904000-1904000) [ 0.105555] regulator_set_voltage_complete: name=s5, val=320000 [ 0.105793] s6: supplied by vph_pwr [ 0.106115] s7: supplied by vph_pwr [ 0.106164] s7: Bringing 0uV into 900000-900000uV [ 0.106171] regulator_set_voltage: name=s7 (900000-900000) [ 0.106277] regulator_set_voltage_complete: name=s7, val=320000 [ 0.106595] s8: supplied by vph_pwr [ 0.106886] s9: supplied by vph_pwr [ 0.107187] s10: supplied by vph_pwr [ 0.107547] s11: supplied by vph_pwr [ 0.107860] s12: supplied by vph_pwr [ 0.108463] s13: supplied by vph_pwr [ 0.112373] l1: supplied by s7 [ 0.112505] l1: Bringing 0uV into 880000-880000uV [ 0.112516] regulator_set_voltage: name=l1 (880000-880000) [ 0.112666] regulator_set_voltage_complete: name=l1, val=312000 [ 0.112889] l2: supplied by s3 [ 0.112941] l2: Bringing 0uV into 1200000-1200000uV [ 0.112950] regulator_set_voltage: name=l2 (1200000-1200000) [ 0.113083] regulator_set_voltage_complete: name=l2, val=312000 [ 0.113307] l3: supplied by s7 [ 0.113355] l3: Bringing 0uV into 1000000-1000000uV [ 0.113364] regulator_set_voltage: name=l3 (1000000-1000000) [ 0.113485] regulator_set_voltage_complete: name=l3, val=312000 [ 0.113693] l4: supplied by s7 [ 0.114035] l5: supplied by s7 [ 0.114084] l5: Bringing 0uV into 800000-800000uV [ 0.114093] regulator_set_voltage: name=l5 (800000-800000) [ 0.114205] regulator_set_voltage_complete: name=l5, val=312000 [ 0.114409] l6: supplied by s5 [ 0.114461] l6: Bringing 0uV into 1808000-1808000uV [ 0.114470] regulator_set_voltage: name=l6 (1808000-1808000) [ 0.114574] regulator_set_voltage_complete: name=l6, val=1664000 [ 0.114799] l7: supplied by s5 [ 0.114850] l7: Bringing 0uV into 1800000-1800000uV [ 0.114860] regulator_set_voltage: name=l7 (1800000-1800000) [ 0.114969] regulator_set_voltage_complete: name=l7, val=1256000 [ 0.115174] l8: supplied by s3 [ 0.115299] l8: Bringing 0uV into 1200000-1200000uV [ 0.115308] regulator_set_voltage: name=l8 (1200000-1200000) [ 0.115409] regulator_set_voltage_complete: name=l8, val=312000 [ 0.115637] l9: Bringing 0uV into 1808000-1808000uV [ 0.115645] regulator_set_voltage: name=l9 (1808000-1808000) [ 0.115749] regulator_set_voltage_complete: name=l9, val=1664000 [ 0.115994] l10: Bringing 0uV into 1808000-1808000uV [ 0.116003] regulator_set_voltage: name=l10 (1808000-1808000) [ 0.116202] regulator_set_voltage_complete: name=l10, val=1664000 [ 0.116469] l11: supplied by s7 [ 0.116530] l11: Bringing 0uV into 1000000-1000000uV [ 0.116539] regulator_set_voltage: name=l11 (1000000-1000000) [ 0.120187] regulator_set_voltage_complete: name=l11, val=312000 [ 0.120459] l12: supplied by s5 [ 0.120512] l12: Bringing 0uV into 1800000-1800000uV [ 0.120522] regulator_set_voltage: name=l12 (1800000-1800000) [ 0.120602] regulator_set_voltage_complete: name=l12, val=1256000 [ 0.120951] l13: Bringing 0uV into 1808000-1808000uV [ 0.120960] regulator_set_voltage: name=l13 (1808000-1808000) [ 0.121103] regulator_set_voltage_complete: name=l13, val=1664000 [ 0.121359] l14: supplied by s5 [ 0.121407] l14: Bringing 0uV into 1880000-1880000uV [ 0.121417] regulator_set_voltage: name=l14 (1880000-1880000) [ 0.121540] regulator_set_voltage_complete: name=l14, val=1256000 [ 0.121812] l15: supplied by s5 [ 0.121868] l15: Bringing 0uV into 1800000-1800000uV [ 0.121877] regulator_set_voltage: name=l15 (1800000-1800000) [ 0.122001] regulator_set_voltage_complete: name=l15, val=1256000 [ 0.122270] l16: Bringing 0uV into 2704000-2704000uV [ 0.122280] regulator_set_voltage: name=l16 (2704000-2704000) [ 0.122403] regulator_set_voltage_complete: name=l16, val=1664000 [ 0.122675] l17: supplied by s3 [ 0.122802] l17: Bringing 0uV into 1304000-1304000uV [ 0.122812] regulator_set_voltage: name=l17 (1304000-1304000) [ 0.122922] regulator_set_voltage_complete: name=l17, val=312000 [ 0.123245] l18: Bringing 0uV into 2704000-2704000uV [ 0.123255] regulator_set_voltage: name=l18 (2704000-2704000) [ 0.123359] regulator_set_voltage_complete: name=l18, val=1664000 [ 0.123631] l19: Bringing 0uV into 3008000-3008000uV [ 0.123641] regulator_set_voltage: name=l19 (3008000-3008000) [ 0.123745] regulator_set_voltage_complete: name=l19, val=1664000 [ 0.124090] l20: Bringing 0uV into 2960000-2960000uV [ 0.124098] regulator_set_voltage: name=l20 (2960000-2960000) [ 0.124282] regulator_set_voltage_complete: name=l20, val=1664000 [ 0.124620] l21: Bringing 0uV into 2960000-2960000uV [ 0.124628] regulator_set_voltage: name=l21 (2960000-2960000) [ 0.124744] regulator_set_voltage_complete: name=l21, val=1664000 [ 0.125106] l22: Bringing 0uV into 2864000-2864000uV [ 0.125116] regulator_set_voltage: name=l22 (2864000-2864000) [ 0.125218] regulator_set_voltage_complete: name=l22, val=1664000 [ 0.125618] l23: Bringing 0uV into 3312000-3312000uV [ 0.125629] regulator_set_voltage: name=l23 (3312000-3312000) [ 0.128255] regulator_set_voltage_complete: name=l23, val=1664000 [ 0.128668] l24: Bringing 0uV into 3088000-3088000uV [ 0.128679] regulator_set_voltage: name=l24 (3088000-3088000) [ 0.128812] regulator_set_voltage_complete: name=l24, val=1664000 [ 0.129205] l25: Bringing 0uV into 3104000-3104000uV [ 0.129214] regulator_set_voltage: name=l25 (3104000-3104000) [ 0.129353] regulator_set_voltage_complete: name=l25, val=1664000 [ 0.129772] l26: supplied by s3 [ 0.129900] l26: Bringing 0uV into 1200000-1200000uV [ 0.129909] regulator_set_voltage: name=l26 (1200000-1200000) [ 0.130034] regulator_set_voltage_complete: name=l26, val=312000 [ 0.130443] l27: supplied by s7 [ 0.130927] l28: Bringing 0uV into 3008000-3008000uV [ 0.130936] regulator_set_voltage: name=l28 (3008000-3008000) [ 0.131060] regulator_set_voltage_complete: name=l28, val=1664000 [ 0.131546] lvs1: supplied by s4 [ 0.132110] lvs2: supplied by s4 [ 0.134478] bob: supplied by vph_pwr [ 0.134548] bob: Bringing 0uV into 3312000-3312000uV [ 0.134558] regulator_set_voltage: name=bob (3312000-3312000) [ 0.137571] regulator_set_voltage_complete: name=bob, val=3312000 [ 0.472084] workingset: timestamp_bits=62 max_order=20 bucket_order=0 [ 0.483966] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) [ 0.484014] io scheduler noop registered (default) [ 0.486248] qcom-qmp-phy 1da7000.phy: Linked as a consumer to regulator.15 [ 0.486350] qcom-qmp-phy 1da7000.phy: Linked as a consumer to regulator.16 [ 0.487630] qcom-qmp-phy 1da7000.phy: Registered Qcom-QMP phy [ 0.498419] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled [ 0.504539] msm_serial c1b0000.serial: msm_serial: detected port #0 [ 0.504647] msm_serial c1b0000.serial: uartclk = 1843200 [ 0.504825] c1b0000.serial: ttyMSM0 at MMIO 0xc1b0000 (irq = 13, base_baud = 115200) is a MSM [ 0.504926] clk_prepare: xo_board [ 0.504964] clk_prepare_complete: xo_board [ 0.504974] clk_prepare: xo [ 0.504982] clk_prepare_complete: xo [ 0.504994] clk_prepare: blsp2_uart2_apps_clk_src [ 0.505002] clk_prepare_complete: blsp2_uart2_apps_clk_src [ 0.505013] clk_prepare: gcc_blsp2_uart2_apps_clk [ 0.505024] clk_prepare_complete: gcc_blsp2_uart2_apps_clk [ 0.505056] clk_enable: xo_board [ 0.505074] clk_enable_complete: xo_board [ 0.505083] clk_enable: xo [ 0.505091] clk_enable_complete: xo [ 0.505101] clk_enable: blsp2_uart2_apps_clk_src [ 0.505112] clk_enable_complete: blsp2_uart2_apps_clk_src [ 0.505120] clk_enable: gcc_blsp2_uart2_apps_clk [ 0.505174] clk_enable_complete: gcc_blsp2_uart2_apps_clk [ 0.505188] clk_prepare: gcc_blsp2_ahb_clk [ 0.505196] clk_prepare_complete: gcc_blsp2_ahb_clk [ 0.505207] clk_enable: gcc_blsp2_ahb_clk [ 0.505225] clk_enable_complete: gcc_blsp2_ahb_clk [ 0.505271] msm_serial: console setup on port #0 [ 0.505587] clk_prepare: gpll0 [ 0.505596] clk_prepare_complete: gpll0 [ 0.505604] clk_prepare: gpll0_out_main [ 0.505614] clk_prepare_complete: gpll0_out_main [ 0.505625] clk_enable: gpll0 [ 0.505653] clk_enable_complete: gpll0 [ 0.505660] clk_enable: gpll0_out_main [ 0.505668] clk_enable_complete: gpll0_out_main [ 0.505707] clk_set_parent: blsp2_uart2_apps_clk_src gpll0_out_main [ 0.505758] clk_set_parent_complete: blsp2_uart2_apps_clk_src gpll0_out_main [ 0.505786] clk_set_rate: blsp2_uart2_apps_clk_src 3686400 [ 0.505806] clk_set_rate_complete: blsp2_uart2_apps_clk_src 3686400 [ 0.505821] clk_set_rate: gcc_blsp2_uart2_apps_clk 3686400 [ 0.505830] clk_set_rate_complete: gcc_blsp2_uart2_apps_clk 3686400 [ 1.821013] printk: console [ttyMSM0] enabled [ 1.828106] msm_serial: driver initialized [ 1.833306] genpd_power_on: ufs_gdsc [ 1.840477] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 50000000 max 200000000 name core_clk [ 1.840557] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 50000000 max 200000000 name bus_aggr_clk [ 1.848097] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name iface_clk [ 1.856991] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 37500000 max 150000000 name core_clk_unipro [ 1.864553] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 75000000 max 300000000 name core_clk_ice [ 1.873664] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name ref_clk [ 1.882501] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name tx_lane0_sync_clk [ 1.889705] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name rx_lane0_sync_clk [ 1.897951] ufshcd-qcom 1da4000.ufshc: freq-table-hz: min 0 max 0 name rx_lane1_sync_clk [ 1.906036] ufshcd-qcom 1da4000.ufshc: ufshcd_populate_vreg: Unable to find vdd-hba-supply regulator, assuming enabled [ 1.914493] clk_set_rate: gpll0_out_main 595200000 [ 1.924592] clk_set_rate_complete: gpll0_out_main 595200000 [ 1.929358] clk_set_rate: blsp2_uart2_apps_clk_src 3656908 [ 1.934835] clk_set_rate_complete: blsp2_uart2_apps_clk_src 3656908 [ 1.940388] clk_set_rate: gcc_blsp2_uart2_apps_clk 3656908 [ 1.946542] clk_set_rate_complete: gcc_blsp2_uart2_apps_clk 3656908 [ 1.952103] clk_set_rate: ufs_unipro_core_clk_src 148800000 [ 1.958267] clk_set_rate_complete: ufs_unipro_core_clk_src 148800000 [ 1.963820] clk_set_rate: gcc_ufs_unipro_core_clk 148800000 [ 1.970412] clk_set_rate_complete: gcc_ufs_unipro_core_clk 148800000 [ 1.975717] clk_set_rate: usb30_master_clk_src 119040000 [ 1.982311] clk_set_rate_complete: usb30_master_clk_src 119040000 [ 1.987627] clk_set_rate: gcc_aggre1_usb3_axi_clk 119040000 [ 1.993591] clk_set_rate_complete: gcc_aggre1_usb3_axi_clk 119040000 [ 1.998982] clk_set_rate: gcc_cfg_noc_usb3_axi_clk 119040000 [ 2.005573] clk_set_rate_complete: gcc_cfg_noc_usb3_axi_clk 119040000 [ 2.011220] clk_set_rate: gcc_usb30_master_clk 119040000 [ 2.017549] clk_set_rate_complete: gcc_usb30_master_clk 119040000 [ 2.022933] clk_set_rate: ufs_axi_clk_src 200000000 [ 2.028918] clk_set_rate_complete: ufs_axi_clk_src 200000000 [ 2.033611] clk_set_rate: gcc_aggre1_ufs_axi_clk 200000000 [ 2.039510] clk_set_rate_complete: gcc_aggre1_ufs_axi_clk 200000000 [ 2.044808] clk_set_rate: gcc_ufs_axi_clk 200000000 [ 2.050961] clk_set_rate_complete: gcc_ufs_axi_clk 200000000 [ 2.055835] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: core_clk, rate: 198400000 [ 2.061775] clk_set_rate: gpll0_out_main 595200000 [ 2.069800] clk_set_rate_complete: gpll0_out_main 595200000 [ 2.074495] clk_set_rate: blsp2_uart2_apps_clk_src 3656908 [ 2.079972] clk_set_rate_complete: blsp2_uart2_apps_clk_src 3656908 [ 2.085525] clk_set_rate: gcc_blsp2_uart2_apps_clk 3656908 [ 2.091680] clk_set_rate_complete: gcc_blsp2_uart2_apps_clk 3656908 [ 2.097241] clk_set_rate: ufs_unipro_core_clk_src 148800000 [ 2.103406] clk_set_rate_complete: ufs_unipro_core_clk_src 148800000 [ 2.108963] clk_set_rate: gcc_ufs_unipro_core_clk 148800000 [ 2.115549] clk_set_rate_complete: gcc_ufs_unipro_core_clk 148800000 [ 2.120855] clk_set_rate: usb30_master_clk_src 119040000 [ 2.127449] clk_set_rate_complete: usb30_master_clk_src 119040000 [ 2.132749] clk_set_rate: gcc_aggre1_usb3_axi_clk 119040000 [ 2.138729] clk_set_rate_complete: gcc_aggre1_usb3_axi_clk 119040000 [ 2.144119] clk_set_rate: gcc_cfg_noc_usb3_axi_clk 119040000 [ 2.150713] clk_set_rate_complete: gcc_cfg_noc_usb3_axi_clk 119040000 [ 2.156358] clk_set_rate: gcc_usb30_master_clk 119040000 [ 2.162686] clk_set_rate_complete: gcc_usb30_master_clk 119040000 [ 2.168074] clk_set_rate: ufs_axi_clk_src 200000000 [ 2.174057] clk_set_rate_complete: ufs_axi_clk_src 200000000 [ 2.178753] clk_set_rate: gcc_aggre1_ufs_axi_clk 200000000 [ 2.184649] clk_set_rate_complete: gcc_aggre1_ufs_axi_clk 200000000 [ 2.189950] clk_set_rate: gcc_ufs_axi_clk 200000000 [ 2.196102] clk_set_rate_complete: gcc_ufs_axi_clk 200000000 [ 2.200972] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: bus_aggr_clk, rate: 198400000 [ 2.206901] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: iface_clk, rate: 0 [ 2.215339] clk_set_rate: gpll0_out_main 595200000 [ 2.222754] clk_set_rate_complete: gpll0_out_main 595200000 [ 2.227531] clk_set_rate: blsp2_uart2_apps_clk_src 3656908 [ 2.233010] clk_set_rate_complete: blsp2_uart2_apps_clk_src 3656908 [ 2.238564] clk_set_rate: gcc_blsp2_uart2_apps_clk 3656908 [ 2.244719] clk_set_rate_complete: gcc_blsp2_uart2_apps_clk 3656908 [ 2.250280] clk_set_rate: ufs_unipro_core_clk_src 150000000 [ 2.256443] clk_set_rate_complete: ufs_unipro_core_clk_src 150000000 [ 2.262002] clk_set_rate: gcc_ufs_unipro_core_clk 150000000 [ 2.268592] clk_set_rate_complete: gcc_ufs_unipro_core_clk 150000000 [ 2.273896] clk_set_rate: usb30_master_clk_src 119040000 [ 2.280489] clk_set_rate_complete: usb30_master_clk_src 119040000 [ 2.285786] clk_set_rate: gcc_aggre1_usb3_axi_clk 119040000 [ 2.291768] clk_set_rate_complete: gcc_aggre1_usb3_axi_clk 119040000 [ 2.297156] clk_set_rate: gcc_cfg_noc_usb3_axi_clk 119040000 [ 2.303749] clk_set_rate_complete: gcc_cfg_noc_usb3_axi_clk 119040000 [ 2.309396] clk_set_rate: gcc_usb30_master_clk 119040000 [ 2.315727] clk_set_rate_complete: gcc_usb30_master_clk 119040000 [ 2.321112] clk_set_rate: ufs_axi_clk_src 198400000 [ 2.327095] clk_set_rate_complete: ufs_axi_clk_src 198400000 [ 2.331790] clk_set_rate: gcc_aggre1_ufs_axi_clk 198400000 [ 2.337689] clk_set_rate_complete: gcc_aggre1_ufs_axi_clk 198400000 [ 2.342986] clk_set_rate: gcc_ufs_axi_clk 198400000 [ 2.349138] clk_set_rate_complete: gcc_ufs_axi_clk 198400000 [ 2.354010] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: core_clk_unipro, rate: 148800000 [ 2.359951] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: core_clk_ice, rate: 0 [ 2.368717] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: ref_clk, rate: 19200000 [ 2.376433] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: tx_lane0_sync_clk, rate: 0 [ 2.384247] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: rx_lane0_sync_clk, rate: 0 [ 2.392584] ufshcd-qcom 1da4000.ufshc: ufshcd_init_clocks: clk: rx_lane1_sync_clk, rate: 0 [ 2.400821] clk_prepare: ufs_axi_clk_src [ 2.409030] clk_prepare_complete: ufs_axi_clk_src [ 2.413115] clk_prepare: gcc_ufs_axi_clk [ 2.417711] clk_prepare_complete: gcc_ufs_axi_clk [ 2.421717] clk_enable: ufs_axi_clk_src [ 2.426300] clk_enable_complete: ufs_axi_clk_src [ 2.429951] clk_enable: gcc_ufs_axi_clk [ 2.434806] clk_enable_complete: gcc_ufs_axi_clk [ 2.438385] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: core_clk enabled [ 2.443261] clk_prepare: gcc_aggre1_ufs_axi_clk [ 2.450616] clk_prepare_complete: gcc_aggre1_ufs_axi_clk [ 2.455134] clk_enable: gcc_aggre1_ufs_axi_clk [ 2.460683] clk_enable_complete: gcc_aggre1_ufs_axi_clk [ 2.464941] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: bus_aggr_clk enabled [ 2.470081] clk_prepare: gcc_ufs_ahb_clk [ 2.478043] clk_prepare_complete: gcc_ufs_ahb_clk [ 2.482211] clk_enable: gcc_ufs_ahb_clk [ 2.486805] clk_enable_complete: gcc_ufs_ahb_clk [ 2.490461] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: iface_clk enabled [ 2.495342] clk_prepare: ufs_unipro_core_clk_src [ 2.503047] clk_prepare_complete: ufs_unipro_core_clk_src [ 2.507650] clk_prepare: gcc_ufs_unipro_core_clk [ 2.512939] clk_prepare_complete: gcc_ufs_unipro_core_clk [ 2.517635] clk_enable: ufs_unipro_core_clk_src [ 2.522917] clk_enable_complete: ufs_unipro_core_clk_src [ 2.527264] clk_enable: gcc_ufs_unipro_core_clk [ 2.532816] clk_enable_complete: gcc_ufs_unipro_core_clk [ 2.537081] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: core_clk_unipro enabled [ 2.542653] clk_prepare: gcc_ufs_ice_core_clk [ 2.550700] clk_prepare_complete: gcc_ufs_ice_core_clk [ 2.555132] clk_enable: gcc_ufs_ice_core_clk [ 2.560160] clk_enable_complete: gcc_ufs_ice_core_clk [ 2.564593] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: core_clk_ice enabled [ 2.569567] clk_prepare: ln_bb_clk1 [ 2.577656] clk_prepare_complete: ln_bb_clk1 [ 2.580824] clk_enable: ln_bb_clk1 [ 2.585323] clk_enable_complete: ln_bb_clk1 [ 2.588545] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: ref_clk enabled [ 2.592654] clk_prepare: gcc_ufs_tx_symbol_0_clk [ 2.600268] clk_prepare_complete: gcc_ufs_tx_symbol_0_clk [ 2.605047] clk_enable: gcc_ufs_tx_symbol_0_clk [ 2.610330] clk_enable_complete: gcc_ufs_tx_symbol_0_clk [ 2.614684] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: tx_lane0_sync_clk enabled [ 2.620262] clk_prepare: gcc_ufs_rx_symbol_0_clk [ 2.628653] clk_prepare_complete: gcc_ufs_rx_symbol_0_clk [ 2.633260] clk_enable: gcc_ufs_rx_symbol_0_clk [ 2.638544] clk_enable_complete: gcc_ufs_rx_symbol_0_clk [ 2.642894] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: rx_lane0_sync_clk enabled [ 2.648474] clk_prepare: gcc_ufs_rx_symbol_1_clk [ 2.656865] clk_prepare_complete: gcc_ufs_rx_symbol_1_clk [ 2.661471] clk_enable: gcc_ufs_rx_symbol_1_clk [ 2.666755] clk_enable_complete: gcc_ufs_rx_symbol_1_clk [ 2.671107] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: rx_lane1_sync_clk enabled [ 2.676718] ufshcd_clk_gating: 1da4000.ufshc: gating state changed to CLKS_ON [ 2.685119] ufshcd_profile_clk_gating: 1da4000.ufshc: on: took 284281 usecs, err 0 [ 2.692346] l20: supplied by bob [ 2.699851] ufshcd-qcom 1da4000.ufshc: Linked as a consumer to regulator.34 [ 2.703096] ufshcd-qcom 1da4000.ufshc: Linked as a consumer to regulator.40 [ 2.709762] ufshcd-qcom 1da4000.ufshc: Linked as a consumer to regulator.5 [ 2.716682] regulator_enable: name=bob [ 2.723621] regulator_enable_delay: name=bob [ 2.727274] regulator_enable_complete: name=bob [ 2.731694] regulator_enable: name=l20 [ 2.736380] regulator_enable_delay: name=l20 [ 2.739755] regulator_enable_complete: name=l20 [ 2.744211] regulator_enable: name=s3 [ 2.748512] regulator_enable_delay: name=s3 [ 2.752259] regulator_enable_complete: name=s3 [ 2.756261] regulator_enable: name=l26 [ 2.761014] regulator_enable_delay: name=l26 [ 2.764504] regulator_enable_complete: name=l26 [ 2.768936] regulator_enable: name=s4 [ 2.773250] regulator_enable_delay: name=s4 [ 2.776998] regulator_enable_complete: name=s4 [ 2.790019] scsi host0: ufshcd [ 2.792459] regulator_enable: name=s7 [ 2.792601] regulator_enable_delay: name=s7 [ 2.795717] regulator_enable_complete: name=s7 [ 2.799782] regulator_enable: name=l1 [ 2.804282] regulator_enable: name=l2 [ 2.808033] regulator_enable_delay: name=l2 [ 2.811636] regulator_enable_complete: name=l2 [ 2.815632] regulator_enable_delay: name=l1 [ 2.820138] regulator_enable_complete: name=l1 [ 2.824217] clk_prepare: gcc_ufs_clkref_clk [ 2.828717] clk_prepare_complete: gcc_ufs_clkref_clk [ 2.832804] clk_prepare: ufs_phy_aux_clk_src [ 2.837998] clk_prepare_complete: ufs_phy_aux_clk_src [ 2.842260] clk_prepare: gcc_ufs_phy_aux_clk [ 2.847200] clk_prepare_complete: gcc_ufs_phy_aux_clk [ 2.851594] clk_enable: gcc_ufs_clkref_clk [ 2.856489] clk_enable_complete: gcc_ufs_clkref_clk [ 2.860488] clk_enable: ufs_phy_aux_clk_src [ 2.865250] clk_enable_complete: ufs_phy_aux_clk_src [ 2.869421] clk_enable: gcc_ufs_phy_aux_clk [ 2.874629] clk_enable_complete: gcc_ufs_phy_aux_clk [ 2.888794] genpd_power_off: ufs_gdsc [ 2.905238] ufshcd-qcom 1da4000.ufshc: ufshcd_print_pwr_info:[RX, TX]: gear=[1, 1], lane[1, 1], pwr[SLOWAUTO_MODE, SLOWAUTO_MODE], rate = 0 [ 2.905557] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:00 00 00 1f 00 00 00 00 00 00 00 00, CDB:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 2.928298] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 [ 2.929902] ufshcd_command: dev_complete: 1da4000.ufshc: tag: 31, DB: 0x0, size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 [ 2.944975] genpd: Not disabling unused power domains [ 2.953504] clk: Not disabling unused clocks [ 2.958138] ufshcd_wait_for_dev_cmd: max_timeout=500 jiffies=125 time_left=125 [ 2.962719] l9: supplied by bob [ 2.969522] ufshcd_upiu: query_complete: 1da4000.ufshc: HDR:00 00 00 1f 00 00 00 00 00 00 00 00, CDB:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 2.972652] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 2.986262] l10: supplied by bob [ 2.999007] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 [ 3.002349] l13: supplied by bob [ 3.013845] l16: supplied by bob [ 3.017137] l18: supplied by bob [ 3.020344] l19: supplied by bob [ 3.023618] l21: supplied by bob [ 3.026758] l22: supplied by bob [ 3.029970] l23: supplied by bob [ 3.033184] l24: supplied by bob [ 3.036396] l25: supplied by bob [ 3.039598] l28: supplied by bob [ 3.044308] clk_set_rate: blsp2_uart2_apps_clk_src 3686400 [ 3.046043] clk_set_rate_complete: blsp2_uart2_apps_clk_src 3686400 [ 3.051280] clk_set_rate: gcc_blsp2_uart2_apps_clk 3686400 [ 3.057430] clk_set_rate_complete: gcc_blsp2_uart2_apps_clk 3686400 [ 6.112215] ufshcd_wait_for_dev_cmd: max_timeout=3000 jiffies=750 time_left=0 [ 6.112311] ufshcd-qcom 1da4000.ufshc: ufshcd_wait_for_dev_cmd: dev_cmd request timedout, tag 31 [ 6.118495] ufshcd_upiu: query_complete_err: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 6.127292] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag: Sending flag query for idn 1 failed, err = -11 [ 6.140881] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: failed with error -11, retries 0 [ 6.150352] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 6.159142] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 [ 6.224705] ufshcd-qcom 1da4000.ufshc: ufshcd_update_uic_error: UIC error flags = 0x00000000 [ 6.288357] ufshcd-qcom 1da4000.ufshc: ufshcd_update_uic_error: UIC error flags = 0x00000000 [ 6.358785] ufshcd-qcom 1da4000.ufshc: ufshcd_update_uic_error: UIC error flags = 0x00000001 [ 9.184192] ufshcd_wait_for_dev_cmd: max_timeout=3000 jiffies=750 time_left=0 [ 9.184259] ufshcd-qcom 1da4000.ufshc: ufshcd_wait_for_dev_cmd: dev_cmd request timedout, tag 31 [ 9.190384] ufshcd_upiu: query_complete_err: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 9.199259] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag: Sending flag query for idn 1 failed, err = -11 [ 9.212852] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: failed with error -11, retries 1 [ 9.222326] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 9.231114] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 [ 12.256190] ufshcd_wait_for_dev_cmd: max_timeout=3000 jiffies=750 time_left=0 [ 12.256259] ufshcd-qcom 1da4000.ufshc: ufshcd_wait_for_dev_cmd: dev_cmd request timedout, tag 31 [ 12.262382] ufshcd_upiu: query_complete_err: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 12.271253] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag: Sending flag query for idn 1 failed, err = -11 [ 12.284852] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: failed with error -11, retries 2 [ 12.294324] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 12.303113] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 [ 15.328186] ufshcd_wait_for_dev_cmd: max_timeout=3000 jiffies=750 time_left=0 [ 15.328253] ufshcd-qcom 1da4000.ufshc: ufshcd_wait_for_dev_cmd: dev_cmd request timedout, tag 31 [ 15.334378] ufshcd_upiu: query_complete_err: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 15.343249] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag: Sending flag query for idn 1 failed, err = -11 [ 15.356845] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: failed with error -11, retries 3 [ 15.366320] ufshcd_upiu: query_send: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 15.375106] ufshcd_command: send: 1da4000.ufshc: tag: 31, DB: 0x80000000, size: -1, IS: 0, LBA: 18446744073709551615, opcode: 0x0 [ 18.400183] ufshcd_wait_for_dev_cmd: max_timeout=3000 jiffies=750 time_left=0 [ 18.400251] ufshcd-qcom 1da4000.ufshc: ufshcd_wait_for_dev_cmd: dev_cmd request timedout, tag 31 [ 18.406375] ufshcd_upiu: query_complete_err: 1da4000.ufshc: HDR:16 00 00 1f 00 81 00 00 00 00 00 00, CDB:06 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [ 18.415247] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag: Sending flag query for idn 1 failed, err = -11 [ 18.428848] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: failed with error -11, retries 4 [ 18.438303] ufshcd-qcom 1da4000.ufshc: ufshcd_query_flag_retry: query attribute, opcode 6, idn 1, failed with error -11 after 5 retires [ 18.447097] ufshcd-qcom 1da4000.ufshc: ufshcd_complete_dev_init setting fDeviceInit flag failed with error -11 [ 18.459458] clk_disable: gcc_ufs_phy_aux_clk [ 18.469019] clk_disable_complete: gcc_ufs_phy_aux_clk [ 18.473425] clk_disable: ufs_phy_aux_clk_src [ 18.478368] clk_disable_complete: ufs_phy_aux_clk_src [ 18.482739] clk_disable: gcc_ufs_clkref_clk [ 18.487660] clk_disable_complete: gcc_ufs_clkref_clk [ 18.491695] clk_unprepare: gcc_ufs_phy_aux_clk [ 18.496925] clk_unprepare_complete: gcc_ufs_phy_aux_clk [ 18.501136] clk_unprepare: ufs_phy_aux_clk_src [ 18.506248] clk_unprepare_complete: ufs_phy_aux_clk_src [ 18.510760] clk_unprepare: gcc_ufs_clkref_clk [ 18.515874] clk_unprepare_complete: gcc_ufs_clkref_clk [ 18.520429] regulator_disable: name=l2 [ 18.525608] regulator_disable_complete: name=l2 [ 18.529163] regulator_disable: name=l1 [ 18.533665] regulator_disable_complete: name=l1 [ 18.537405] regulator_disable: name=s7 [ 18.541898] regulator_disable_complete: name=s7 [ 18.545666] regulator_disable: name=l20 [ 18.550179] regulator_disable_complete: name=l20 [ 18.553897] regulator_disable: name=bob [ 18.558826] regulator_disable_complete: name=bob [ 18.562356] regulator_disable: name=l26 [ 18.567258] regulator_disable_complete: name=l26 [ 18.570744] regulator_disable: name=s3 [ 18.575665] regulator_disable_complete: name=s3 [ 18.579166] regulator_disable: name=s4 [ 18.583655] regulator_disable_complete: name=s4 [ 18.587447] clk_disable: gcc_ufs_axi_clk [ 18.591825] clk_disable_complete: gcc_ufs_axi_clk [ 18.596002] clk_unprepare: gcc_ufs_axi_clk [ 18.600591] clk_unprepare_complete: gcc_ufs_axi_clk [ 18.604597] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: core_clk disabled [ 18.609395] clk_disable: gcc_aggre1_ufs_axi_clk [ 18.617349] clk_disable_complete: gcc_aggre1_ufs_axi_clk [ 18.621603] clk_disable: ufs_axi_clk_src [ 18.627150] clk_disable_complete: ufs_axi_clk_src [ 18.631073] clk_unprepare: gcc_aggre1_ufs_axi_clk [ 18.635666] clk_unprepare_complete: gcc_aggre1_ufs_axi_clk [ 18.640358] clk_unprepare: ufs_axi_clk_src [ 18.645729] clk_unprepare_complete: ufs_axi_clk_src [ 18.649819] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: bus_aggr_clk disabled [ 18.654620] clk_disable: gcc_ufs_ahb_clk [ 18.662918] clk_disable_complete: gcc_ufs_ahb_clk [ 18.666833] clk_unprepare: gcc_ufs_ahb_clk [ 18.671425] clk_unprepare_complete: gcc_ufs_ahb_clk [ 18.675424] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: iface_clk disabled [ 18.680230] clk_disable: gcc_ufs_unipro_core_clk [ 18.688182] clk_disable_complete: gcc_ufs_unipro_core_clk [ 18.692872] clk_disable: ufs_unipro_core_clk_src [ 18.698158] clk_disable_complete: ufs_unipro_core_clk_src [ 18.702860] clk_unprepare: gcc_ufs_unipro_core_clk [ 18.708150] clk_unprepare_complete: gcc_ufs_unipro_core_clk [ 18.712845] clk_unprepare: ufs_unipro_core_clk_src [ 18.718304] clk_unprepare_complete: ufs_unipro_core_clk_src [ 18.723172] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: core_clk_unipro disabled [ 18.728667] clk_disable: gcc_ufs_ice_core_clk [ 18.736965] clk_disable_complete: gcc_ufs_ice_core_clk [ 18.741489] clk_unprepare: gcc_ufs_ice_core_clk [ 18.746515] clk_unprepare_complete: gcc_ufs_ice_core_clk [ 18.750952] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: core_clk_ice disabled [ 18.756532] clk_disable: ln_bb_clk1 [ 18.764562] clk_disable_complete: ln_bb_clk1 [ 18.767783] clk_unprepare: ln_bb_clk1 [ 18.772458] clk_unprepare_complete: ln_bb_clk1 [ 18.775854] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: ref_clk disabled [ 18.780226] clk_disable: gcc_ufs_tx_symbol_0_clk [ 18.787746] clk_disable_complete: gcc_ufs_tx_symbol_0_clk [ 18.792615] clk_unprepare: gcc_ufs_tx_symbol_0_clk [ 18.797909] clk_unprepare_complete: gcc_ufs_tx_symbol_0_clk [ 18.802604] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: tx_lane0_sync_clk disabled [ 18.808096] clk_disable: gcc_ufs_rx_symbol_0_clk [ 18.816741] clk_disable_complete: gcc_ufs_rx_symbol_0_clk [ 18.821439] clk_unprepare: gcc_ufs_rx_symbol_0_clk [ 18.826726] clk_unprepare_complete: gcc_ufs_rx_symbol_0_clk [ 18.831420] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: rx_lane0_sync_clk disabled [ 18.836916] clk_disable: gcc_ufs_rx_symbol_1_clk [ 18.845562] clk_disable_complete: gcc_ufs_rx_symbol_1_clk [ 18.850256] clk_unprepare: gcc_ufs_rx_symbol_1_clk [ 18.855546] clk_unprepare_complete: gcc_ufs_rx_symbol_1_clk [ 18.860241] ufshcd-qcom 1da4000.ufshc: __ufshcd_setup_clocks: clk: rx_lane1_sync_clk disabled [ 18.865750] ufshcd_profile_clk_gating: 1da4000.ufshc: off: took 278316 usecs, err 0 [ 18.874428] ufshcd_init: 1da4000.ufshc: took 15986155 usecs, dev_state: UFS_ACTIVE_PWR_MODE, link_state: UIC_LINK_ACTIVE_STATE, err -11 [ 18.893960] Freeing unused kernel memory: 7232K
