Jeremy Higdon wrote:
On Thu, Dec 15, 2005 at 02:17:38AM +0100, Michael Joosten wrote:
Btw, the VisWS Linux port apparently uses non-coherent DMA. Perhaps it
should be switched to coherent DMA, as there could be bugs in that area
with qla1280.
Aha, so we are back at coherence, but it's not MP, but DMA one...
(I'm not sure what is meant with DMA coherence - make sure that before a
DMA transfer is started at least the related CPU cache lines (in the DMA
address range) are written back?)
For a start. You need to invalidate before read into memory and write
back before write to disk. You also need to make sure that the memory
stays out of the CPU cache during the DMA (so you need to make sure that
when you DMA into memory that nothing is loading or storing to a cacheline
that you're DMA'ing into. On a speculative execution CPU, this is really
hard.
Aha. Thanks for the info, now I can figure what's going on.
in qla1280_32/64bit_start_scsi().
We're going to work on an API change to mmiowb() instead.
OK. From my point, this has been settled and I'll stay tuned to test a
patch. It's not urgent.
Thanks for the lively discussion and some insights, Michael
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