Re: [PATCH]: Re: qla1280.c broken on SGI visws, PCI coherency problem

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Jeremy Higdon wrote:
...snip...
>> My primary concern in all of this is that the write posting flush was
>> incorrectly removed.  In this case, a UP VISWS should still show the
>> error (now we've established that it's posting even in the PIO case).
>> If it doesn't, I'll be happy with a VISWS specific fix.
> 
> I'm a little surprised that the UP VisWS is showing the problem.  It
> looks like it might be reordering writes from the same CPU, though that
> seems really unlikely.  I think more debugging of the VisWS is in order
> before we can draw any conclustions.
> 
...snip...

I don't think it has yet been determined that UP is exhibiting the
problem.  I haven't seen a reply after James requested that the
test be rerun using UP kernel.

(I think it was inferred that the VISWS in question was MP but
I didn't see it explicitely stated.)

Mike
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