On Tue, Apr 05, 2005 at 09:05:15AM -0500, James Bottomley wrote: > On Tue, 2005-04-05 at 08:42 +0100, Russell King wrote: > > Not so. There are two different styles of big endian. (Lets just face > > it, BE is fucked in the head anyway...) > > > > physical bus: 31...24 23...16 15...8 7...0 > > > > BE version 1 (word invariant) > > byte access byte 0 byte 1 byte 2 byte 3 > > word access 31-24 23-16 15-8 7-0 > > > > BE version 2 (byte invariant) > > byte access byte 3 byte 2 byte 1 byte 0 > > word access 7-0 15-8 23-16 31-24 > > These are just representations of the same thing. However, I did > deliberately elect not to try to solve this problem in the accessors. I > know all about the register relayout, because 53c700 has to do that on > parisc. They aren't. On some of our platforms, we have to exclusive-or the address for byte accesses with 3 to convert to the right endian-ness. Sure, from the point of view of which byte each byte of a word represents, it's true that they're indentical. But as far as the hardware is concerned, they're definitely different. See the Intel IXP platforms for an example. -- Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of: 2.6 Serial core - : send the line "unsubscribe linux-scsi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
