[PATCH v1 2/4] dt-bindings: phy: add samsung,exynos2200-usbcon-phy schema file

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The Exynos2200 SoC has a USB phy controller block that controls the
usage of USB phys. Add a dt-binding schema for the new driver.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@xxxxxxxxx>
---
 .../phy/samsung,exynos2200-usbcon-phy.yaml    | 70 +++++++++++++++++++
 1 file changed, 70 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/samsung,exynos2200-usbcon-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos2200-usbcon-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos2200-usbcon-phy.yaml
new file mode 100644
index 000000000..468dc1560
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/samsung,exynos2200-usbcon-phy.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/samsung,exynos2200-usbcon-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Exynos2200 USB controller phy
+
+maintainers:
+  - Ivaylo Ivanov <ivo.ivanov.ivanov1@xxxxxxxxx>
+
+description:
+  USB controller manages phy selecton for UTMI and PIPE3
+
+properties:
+  compatible:
+    enum:
+      - samsung,exynos2200-usbcon-phy
+
+  reg:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 0
+
+  clocks:
+    items:
+      - description: APB clock
+
+  clock-names:
+    items:
+      - const: apb
+
+  samsung,pmu-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: phandle for PMU system controller interface, used to
+                 control PMU registers bits for USBCON PHY
+
+  vdd1p9-supply:
+    description:
+      Phandle to 1.9V regulator supply
+
+  vdd3-supply:
+    description:
+      Phandle to 3V regulator supply
+
+required:
+  - compatible
+  - reg
+  - "#phy-cells"
+  - clocks
+  - clock-names
+  - samsung,pmu-syscon
+  - vdd1p9-supply
+  - vdd3-supply
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/samsung,exynos2200.h>
+
+    usb_con_phy: phy@10aa0000 {
+        compatible = "samsung,exynos2200-snps-eusb2-phy";
+        reg = <0 0x10aa0000 0 0x10000>;
+        clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>;
+        clock-names = "apb";
+        #phy-cells = <0>;
+        samsung,pmu-syscon = <&pmu_system_controller>;
+    };
-- 
2.43.0





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