On 03/04/2024 18:23, Lukasz Luba wrote:
> On some devices there are HW dependencies for shared frequency and voltage
> between devices: CPUs and L3 cache. When the L3 cache frequency is
> increased, the affected CPUs might run at higher voltage and frequency.
IMHO, this is an example where the min Performance State (PS) makes
sense. But what's a use case for the max PS?
> That higher voltage causes higher CPU power and thus more energy is used
> for running the tasks.
>
> Add performance state limits which are applied for the device. This allows
Regarding device, I thought that this is only applicable for device type
CPU?
> the Energy Model (EM) to better reflect the CPU's currently available
> performance states. This information is used by Energy Aware Scheduler
> (EAS) during task placement to avoid situation when a simulated energy
> cost has error due to using wrong Power Domain (PD) frequency.
Maybe better?
This is important on SoCs with HW dependencies mentioned above so that
the Energy Aware Scheduler (EAS) does not use performance states
outside the valid min-max range for energy calculation.
> The function performs only bare minimum checks (and requires EM as
s/The function/em_update_performance_limits()
s/EM/PD ... I guess we always pass a PD pointer to all the EM functions.
I guess we can say that an EM consists of at least 2 PDs.
I guess it's valid to say that we limit per PD, e.g. per little CPUs?
[...]
> /**
> * em_pd_get_efficient_state() - Get an efficient performance state from the EM
> @@ -189,12 +195,13 @@ int em_dev_update_chip_binning(struct device *dev);
> */
Missing min_ps, max_ps description in function header of
em_pd_get_efficient_state().
[...]
> +/**
> + * em_update_performance_limits() - Update Energy Model with performance
> + * limits information.
> + * @pd : Performance Domain with EM that has to be updated.
> + * @freq_min_khz : New minimum allowed frequency for this device.
> + * @freq_max_khz : New maximum allowed frequency for this device.
> + *
> + * This function allows to update the EM with information about available
> + * performance levels. It takes the minimum and maximum frequency in kHz
> + * and does internal translation to performance levels.
> + * Returns 0 on success or -EINVAL when failed.
> + */
> +int em_update_performance_limits(struct em_perf_domain *pd,
> + unsigned long freq_min_khz, unsigned long freq_max_khz)
> +{
> + struct em_perf_state *table;
> + int min_ps = -1;
> + int max_ps = -1;
> + int i;
> +
> + if (!pd)
> + return -EINVAL;
> +
> + rcu_read_lock();
> + table = em_perf_state_from_pd(pd);
> +
> + for (i = 0; i < pd->nr_perf_states; i++) {
> + if (freq_min_khz == table[i].frequency)
So the caller has to know the exact frequency value of the performance
states (PSs)? It's not 'f(PS_n-1) + 1 <= x <= f(PS_n)'.
[...]
