Hi all, This patch set allows to specify in the EM the range of performance levels that the device is allowed to operate. It will impact EAS decision, especially for SoCs where CPUs share the voltage & frequency domain with other CPUs or devices e.g. - Mid CPUs + Big CPU - Little CPU + L3 cache in DSU The minimum allowed frequency will be taken into account while doing EAS task placement simulation. When the min frequency is higher for the whole domain and not driven by the CPUs in that PD utilization, than the energy for computation in that PD will be higher. This patch helps to reflect that higher cost. More explanation can be found in my presentation on OSPM2023 [1]. I have shown experiments with Big CPU running high frequency and increasing the L3 cache frequency (to reduce the latency), but that impacted Little CPU which are in the same DVFS domain with L3 cache. It had bad impact for total energy consumed by small tasks placed on Little CPU. The EAS was not aware about the min frequency&voltage of the Little CPUs and energy estimation was wrong. Depends on: patch 2/2: - SCMI cpufreq performance limits notification support (w/ other dependency) [2] patch 1/2: - EM recent patches for chip binning update - to avoid conflict [3] Therefore, the patch 1/2 could go first and patch 2/2 can wait longer. Regards, Lukasz Luba [1] https://www.youtube.com/watch?v=2C-5uikSbtM&list=PL0fKordpLTjKsBOUcZqnzlHShri4YBL1H [2] https://lore.kernel.org/lkml/20240328074131.2839871-1-quic_sibis@xxxxxxxxxxx/ [3] https://lore.kernel.org/lkml/20240403154907.1420245-1-lukasz.luba@xxxxxxx/ Lukasz Luba (2): PM: EM: Add min/max available performance state limits cpufreq: scmi: Update Energy Model with allowed performance limits drivers/cpufreq/scmi-cpufreq.c | 19 +++++++++++--- include/linux/energy_model.h | 22 +++++++++++++--- kernel/power/energy_model.c | 48 ++++++++++++++++++++++++++++++++++ 3 files changed, 82 insertions(+), 7 deletions(-) -- 2.25.1
