v4:
- squash nMUX patch with the PERIC0 patch so that it becomes a single
entity fixing the introduction of the PERIC0 clocks. PERIC1 fix comes
after, as the PERIC1 clocks were introduced after PERIC0.
- fix the fixes tag of the PERIC1 patch.
v3:
- update first patch:
- remove __nMUX() as it duplicated __MUX() with an exception on flags.
- update commit message
- update comment and say that nMUX() shall be used where MUX reparenting
on clock rate chage is allowed
- collect R-b, A-b tags
v2:
- reword commit messages
- drop exynos850 patch on Sam's request
v1: https://lore.kernel.org/linux-samsung-soc/20240229122021.1901785-1-tudor.ambarus@xxxxxxxxxx/
All samsung MUX clocks that are defined with MUX() set the
CLK_SET_RATE_NO_REPARENT flag in __MUX(), which prevents MUXes to be
reparented during clk_set_rate().
Introduce nMUX() for MUX clocks that can be reparented. nMUX is used
in GS101 to reparent the USI MUX to OSCCLK on low SPI clock rates.
Each instance of the USI IP in GS101 has its own MUX_USI clock, thus
the reparenting of a MUX_USI clock corresponds to a single instance
of the USI IP. We allow the reparenting of the MUX_USIx clocks to
OSCCLK. The datasheet mentions OSCCLK just in the low-power mode
context, but the downstream driver reparents too the MUX_USI clocks
to OSCCLK. Follow the downstream driver and do the same.
Tested with USI6 and USI13 SPI.
Find discussion on MUX reparenting to OSCCLK at:
https://lore.kernel.org/linux-samsung-soc/d508dfc1-bc28-4470-92aa-cf71915966f4@xxxxxxxxxx/
Tudor Ambarus (2):
clk: samsung: gs101: propagate PERIC0 USI SPI clock rate
clk: samsung: gs101: propagate PERIC1 USI SPI clock rate
drivers/clk/samsung/clk-gs101.c | 225 +++++++++++++++++---------------
drivers/clk/samsung/clk.h | 11 +-
2 files changed, 129 insertions(+), 107 deletions(-)
--
2.44.0.769.g3c40516874-goog
