Add to support Exynos Auto v9 SoC's spi. By supporting USI(Universal Serial Interface) mode, the SoC can support up to 12 spi ports. Thus, we need to increase MAX_SPI_PORTS from 6 to 12. The spi of the SoC can support loopback mode unlike previous exynos SoCs. To separate the feature, we need to add .has_loopback to the s3c64xx_spi_port_config. Furthermore, it uses 4 as the default internal clock divider. We also need to clk_div field of the structure and assign "2" as the default value to the existing SoC's port config. Device tree definitions of exynosautov9-spi will be added in separated patchset to include usi(i2c/uart/spi) nodes all together. Changes from v2: - Rebase the patches on top of the latest next/master (next-20220629) - Add Andy's R-B tags for #1, #3 and #4 patches - Add Krzysztof's R-B tag for #4 patch - Drop div local variable assignment as suggested by Krzysztof - Change the data type of 'div' local variables to be consistent with clk_div (Pointed by Andy) Changes from v1: - Patch #1 "increase MAX_SPI_PORTS to 12" has been squashed to the patch #4 - Add Krzysztof's RB tags for #1 and #3 patches - Assign clk_div value to 2 for existing SoC's port configs - Make const of exynosautov9_spi_port_config Chanho Park (4): spi: s3c64xx: support loopback mode spi: s3c64xx: support custom value of internal clock divider dt-bindings: samsung,spi: define exynosautov9 compatible spi: s3c64xx: add spi port configuration for Exynos Auto v9 SoC .../devicetree/bindings/spi/samsung,spi.yaml | 5 +- drivers/spi/spi-s3c64xx.c | 54 +++++++++++++++---- 2 files changed, 49 insertions(+), 10 deletions(-) -- 2.36.1
