On 21/10/2021 15:06, Conor.Dooley@xxxxxxxxxxxxx wrote: > On 21/10/2021 13:23, Arnd Bergmann wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On Thu, Oct 21, 2021 at 11:09 AM Krzysztof Kozlowski >> <krzysztof.kozlowski@xxxxxxxxxxxxx> wrote: >>> Hi Arnd and Olof, >>> >>> I have an old patchset for RISC-V dts cleanups which I sent to mailing lists in >>> August 2021 (v1, v2), resent in September and pinged two times. They got some >>> review (from Alexandre Ghiti for SiFive, from Conor Dooley for Microchip) but >>> unfortunately Palmer (RISC-V maintainer) did not respond here. > > Out of curiosity which series is this one? Is it the one with the > plic/clint changes? > Pretty sure that I have taken them in internally, but I am going to > submit a bunch > of changes to our device tree soon (tm) and want to make sure I have the > right > dependent series listed. > There is only one Microchip patch here (plic/clint). Others are for SiFive. All the patches are described in the pull reqeust: https://lore.kernel.org/lkml/20211021090955.115005-1-krzysztof.kozlowski@xxxxxxxxxxxxx/ I had also second set of RISC-V patches for Microchip. These were picked up by Palmer: https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/log/?h=for-next Best regards, Krzysztof
