On Mon, Aug 24, 2020 at 12:43:33PM +0100, Lukasz Luba wrote:
> Hi Krzysztof,
>
> On 8/22/20 5:32 PM, Krzysztof Kozlowski wrote:
> > The struct exynos5_dmc members bypass_rate, mx_mspll_ccore_phy,
> > mout_mx_mspll_ccore_phy and opp_bypass are not actually used.
> >
> > Apparently there was a plan to store the OPP for the bypass mode in
> > opp_bypass member, but drivers fails to do it and instead always sets
> > target voltage during bypass mode.
> >
> > Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> > ---
> > drivers/memory/samsung/exynos5422-dmc.c | 9 ---------
> > 1 file changed, 9 deletions(-)
> >
> > diff --git a/drivers/memory/samsung/exynos5422-dmc.c b/drivers/memory/samsung/exynos5422-dmc.c
> > index 31864ce59b25..df02afa8aa90 100644
> > --- a/drivers/memory/samsung/exynos5422-dmc.c
> > +++ b/drivers/memory/samsung/exynos5422-dmc.c
> > @@ -123,9 +123,7 @@ struct exynos5_dmc {
> > struct mutex lock;
> > unsigned long curr_rate;
> > unsigned long curr_volt;
> > - unsigned long bypass_rate;
> > struct dmc_opp_table *opp;
> > - struct dmc_opp_table opp_bypass;
> > int opp_count;
> > u32 timings_arr_size;
> > u32 *timing_row;
> > @@ -143,8 +141,6 @@ struct exynos5_dmc {
> > struct clk *mout_bpll;
> > struct clk *mout_mclk_cdrex;
> > struct clk *mout_mx_mspll_ccore;
> > - struct clk *mx_mspll_ccore_phy;
> > - struct clk *mout_mx_mspll_ccore_phy;
> > struct devfreq_event_dev **counter;
> > int num_counters;
> > u64 last_overflow_ts[2];
> > @@ -455,9 +451,6 @@ static int exynos5_dmc_align_bypass_voltage(struct exynos5_dmc *dmc,
> > unsigned long target_volt)
> > {
> > int ret = 0;
> > - unsigned long bypass_volt = dmc->opp_bypass.volt_uv;
> > -
> > - target_volt = max(bypass_volt, target_volt);
>
>
> Could you explain which use cases you considered when you decided to
> remove these lines?
There are no use cases attached to these. These are simply not used,
never assigned a value. For example max(0, target_volt) is always equal
to target_volt for unsigned numbers...
Best regards,
Krzysztof
