Hi Marek,
On 5/6/20 10:26 PM, Marek Szyprowski wrote:
> The proper name for CLK_SMMU_FIMCL3 is "smmu_fimcl3". Remove obvious
> typo.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
> ---
> drivers/clk/samsung/clk-exynos5420.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
> index edb2363c735a..fea33399a632 100644
> --- a/drivers/clk/samsung/clk-exynos5420.c
> +++ b/drivers/clk/samsung/clk-exynos5420.c
> @@ -1165,7 +1165,7 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = {
> CLK_IS_CRITICAL, 0),
> GATE(CLK_GSCL_WB, "gscl_wb", "sclk_gscl_wb", GATE_IP_GSCL1, 13,
> CLK_IS_CRITICAL, 0),
> - GATE(CLK_SMMU_FIMCL3, "smmu_fimcl3,", "dout_gscl_blk_333",
> + GATE(CLK_SMMU_FIMCL3, "smmu_fimcl3", "dout_gscl_blk_333",
> GATE_IP_GSCL1, 16, 0, 0),
> GATE(CLK_FIMC_LITE3, "fimc_lite3", "aclk333_432_gscl",
> GATE_IP_GSCL1, 17, 0, 0),
>
Acked-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
--
Best Regards,
Chanwoo Choi
Samsung Electronics
