Acked-by: MyungJoo Ham <myungjoo.ham@xxxxxxxxxxx>
Adding to Chanwoo's reply:
If I understand Chanwoo's intention correctly,
this patchset is to provide a common bus & memory-interface DVFS driver
for several Exynos SoCs, which allows DT to express per-SoC hardware
details so that we do not need to hardcode them with seperated drivers
(as it is now) or a driver with a lot of unused definitions (partly
as it is now).
Having that many looking ugly frequency definitions is
because Exynos SoCs that I've seen until today have many
on-SoC IPs that should change configurations (usually clock speed)
according to the clock speed of bus. Thus, they may look
duplicated.
We may hide such details IF we make one driver per SoC model; however,
it is very inefficient with DT supported kernels if we can write
such details in DTS and make the driver simple and unified.
Cheers,
MyungJoo.
>
> Hi Rob,
>
>First of all, thanks for your review.
>
>On 01/09/2015 06:18 AM, Rob Herring wrote:
>> Adding Viresh.
>>
>> On Wed, Jan 7, 2015 at 7:40 PM, Chanwoo Choi <cw00.choi@xxxxxxxxxxx> wrote:
>>> This patch adds the documentation for generic exynos memory bus frequency
>>> driver.
>>>
>>> Cc: MyungJoo Ham <myungjoo.ham@xxxxxxxxxxx>
>>> Cc: Kyungmin Park <kyungmin.park@xxxxxxxxxxx>
>>> Cc: Kukjin Kim <kgene@xxxxxxxxxx>
>>> Signed-off-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
>>> ---
>>> .../devicetree/bindings/devfreq/exynos-busfreq.txt | 184 +++++++++++++++++++++
>>> 1 file changed, 184 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-busfreq.txt
>>>
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