2011/11/2 Sankara Muthukrishnan <sankara.m@xxxxxxxxx>: > > > 2011/11/1 Raphaël Beamonte <raphael.beamonte@xxxxxxxxx> >> >> Thank you very much for your answers. >> >> > The hwlatdetect application detects system management interrupts >> > (SMIs). Such interrupts are installed by the BIOS and are used to manage >> > various things such as battery management, overheat protection and >> > emulation of legacy devices (e.g. IDE, PS/2 etc.). You may try to check >> > your BIOS settings and disable all these or similar features. >> >> In fact, after disabling almost all features in the bios, the problem >> is still here but a little bit reducted (there is just about 20ms >> latency now.. I think it's linked to the fact the thermal controller >> is disabled). But I didn't find any reference to SMIs in the bios, >> neither in the motherboard documentation (Supermicro X7DAL). The >> computer was not bought for doing realtime, so if it isn't working I >> think I'll change the computer to use one which has good latency >> during the tests. >> >> > One way to find out whether the spikes in the latency are due to >> > SMI(System Management Interrupt) is to read the MSR register that >> > keeps the count of SMIs. So, read the MSR in the start of the test >> > program and the end of the test and see whether the count has >> > increased. Unfortunately, it is model-specific-register and I am not >> > sure whether AMD supports it. I don't think all Intel processors >> > support it either. I know that Nehalem based Intel Core-i7 arrandale >> > processor supports counting SMI thru MSR 0x34 and I have not found it >> > documented in any Intel documentation but found in some reference BIOS >> > source. I have tested it with legacy USB interrupts and found it to >> > work. RDMSR is a privilege-0 instruction though. >> >> 0x34 is not working for me, it's not returning anything (just that he >> can't read) >> > root@station9:/home/xaf/RT# rdmsr 0x34 >> > rdmsr: CPU 0 cannot read MSR 0x00000034 >> The CPU I use here are two Intel(R) Xeon(R) CPU E5405 @ 2.00GHz, and >> I am unable to find any documentation about the results of MSR to know >> what argument I must use to see the number of SMIs. I'll investigate >> more on this... >> >> Thanks one more time ! >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-rt-users" >> in >> the body of a message to majordomo@xxxxxxxxxxxxxxx >> More majordomo info at http://vger.kernel.org/majordomo-info.html > If you are building your own kernel, you can try to disable some SMI sources, even if BIOS does not have an option to disable that. [Note: Most BIOSes provide more options to configure only in their development version and not in the release version]. However, you need to be cautious about what SMIs you are turning off and what the consequences of turning them off are. Again, I don't know what the chipset you are using. To give you an idea, for SMI on ICH9, search for GLB_SMI_EN bit and SMI_LOCK in http://www.intel.com/assets/pdf/datasheet/316972.pdf Regarding MSR for SMI, like I said, that is specific to CPU architectures and CPUs. I tried to find where I got that information for arrandale processors. It is at http://biosbits.org/download/. You may have to find out or ask the manufacturer whether SMI counter is supported and what the MSR is. Good luck. -- To unsubscribe from this list: send the line "unsubscribe linux-rt-users" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
