From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Hi All,
This patch series does the following:
* Adds L2 cache node and marks the SoC as noncoherent
* Enables IP blocks which were explicitly disabled and for
which support is present
* Enables the configs required for RZ/Five SoC
Cheers,
Prabhakar
Lad Prabhakar (5):
riscv: dts: renesas: r9a07g043f: Add L2 cache node
riscv: dts: renesas: r9a07g043f: Add dma-noncoherent property
riscv: dts: renesas: rzfive-smarc: Enable the blocks which were
explicitly disabled
riscv: dts: renesas: rzfive-smarc: Drop dma properties from SSI1 node
riscv: configs: defconfig: Enable configs required for RZ/Five SoC
arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 13 +++++
.../boot/dts/renesas/rzfive-smarc-som.dtsi | 23 --------
arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 55 +------------------
arch/riscv/configs/defconfig | 52 ++++++++++++++++++
4 files changed, 67 insertions(+), 76 deletions(-)
--
2.34.1
