On Thu, Nov 3, 2022 at 3:34 PM Wolfram Sang
<wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> As serial communication requires a clean clock signal, the Serial
> Communication Interfaces with FIFO (SCIF) is clocked by a clock that is
> not affected by Spread Spectrum or Fractional Multiplication.
>
> Hence change the parent clocks for the SCIF modules from the S0D12_PER
> clock to the SASYNCPERD4 clock (which has the same clock rate), cfr.
> R-Car S4-8 Hardware User's Manual rev. 0.81.
>
> Fixes: 24aaff6a6ce4 ("clk: renesas: cpg-mssr: Add support for R-Car S4-8")
> Reported-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-clk-for-v6.2.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
