Hi Laurent,
On Thu, Mar 3, 2016 at 11:49 AM, Laurent Pinchart
<laurent.pinchart@xxxxxxxxxxxxxxxx> wrote:
> On Thursday 03 March 2016 08:37:02 Kuninori Morimoto wrote:
>> >>>> - s2d2 (for 200MHz)
>> >>>> - s2d1 (for 400MHz)
>> >>>
>> >>> Thank you for the information. Do you mean that different FCP instances
>> >>> use different clocks ? If so, could you tell us which clock is used by
>> >>> each instance in th H3 ES1 ?
>> >>
>> >> Sorry for my confusable mail.
>> >> All FCP on H3 ES1 is using above,
>> >> but, M3 or E3 will use different clock.
>> >>
>> >> Is this more clear ?
>> >
>> > Does it mean that every FCP instance uses both the S2D2 and the S2D1
>> > clocks as functional clocks on H3 ES1 ?
>>
>> - s2d2 (200MHz) is for APB-IF,
>> - s2d1 (400MHz) is for AXI-IF, and internal
>>
>> Is this clear answer ?
>
> It is, thank you very much for putting up with my slow mind ;-)
>
> Geert, deciding what clock to use as a parent for the MSTP clock becomes
> interesting, As S2D2 clocks the control interface I propose picking it. This
> shows the limits of the MSTP clock model though, MSTP is really a module stop
> bit, not a clock.
Quoting R-Car Gen3 rev. 0.5E:
"Under software control, the CPG is capable of turning the supply of
clock signals
to individual modules on or off and of resetting individual modules."
So it is a clock signal, or better (or worse): clock signals (plural).
Hence MSTP gates one or more clocks. Sigh...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
