On Tue, 20 Apr 2010 10:52:58 -0700 Salman Qazi <sqazi@xxxxxxxxxx> wrote: > For improving power savings in the non-SMT case, as Arjan suggested, I > will make the changes for heuristically aligning the injection on > multiple cores. This will not be perfect, but then because it's a > power optimization, it doesn't have to always work. I presume that > this works best when done according to the CPU hierarchy? That is, it > is more beneficial to idle an entire socket than the same number of > cores on different sockets? not really; at least not for Intel CPUs. The problem is that due to the cache coherency, as long as one cpu in the system is awake, the memory controllers etc cannot go into a sleep mode... I would not be surprised if AMD has the same behavior... or anyone else with an integrated memory controller for that matter. -- Arjan van de Ven Intel Open Source Technology Centre For development, discussion and tips for power savings, visit http://www.lesswatts.org _______________________________________________ linux-pm mailing list linux-pm@xxxxxxxxxxxxxxxxxxxxxxxxxx https://lists.linux-foundation.org/mailman/listinfo/linux-pm
