> If you did it this way: > > tid1 = power_transaction_start(); > clk_set_rate_pending(clk1, 300, tid1); > clk_set_rate_pending(clk1, 600, tid1); > power_transaction_commit(tid1); You could do it in the way above or you can do it with virtual clocks which allow grouped changes. In the OMAP2 implementation this is currently hidden. You can define a virtual clock which encompasses several key root dividers. Generally for this type of change a pre-scale notifier goes out to registered drivers. That sequencing code does a clk_set_rate() against that virtual clock. The code internally sets up then jumps to SRAM and does any associated voltage shift along with the multi-divider change. On the way back from SRAM the rate change propagates to update all child nodes. Finally a post scale happens. The hardware does give some assistance with a buffer for key clock groups. Most simple clocks don't go through this process. Doing a series of clk_round_rates() before doing your clk_set_rate() to find available speeds given a certain parent allows you to adjust to local needs like what a LCD panels end pixel clock divider needs to be as bounded by panel specs. The clk api is pretty useful. Nothing says it can't be expanded or absorbed. Right now keeping api's like round/set available is good. Regards, Richard W. _______________________________________________ linux-pm mailing list linux-pm@xxxxxxxxxxxxxx https://lists.osdl.org/mailman/listinfo/linux-pm
