Re: [PATCH 2/2] PCI:designware:Fix iATU programming for cfg1, io and mem viewport

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On Thu, Feb 20, 2014 at 08:13:08PM +0800, Kishon Vijay Abraham I wrote:
> Hi Mohit,
> 
> On Thursday 20 February 2014 05:28 PM, Mohit KUMAR DCG wrote:
> > Hello Kishon,
> > 
> >> -----Original Message-----
> >> From: Kishon Vijay Abraham I [mailto:kishon@xxxxxx]
> >> Sent: Thursday, February 20, 2014 5:08 PM
> >> To: Mohit KUMAR DCG; jg1.han@xxxxxxxxxxx
> >> Cc: Ajay KHANDELWAL; Bjorn Helgaas; spear-devel; linux-
> >> pci@xxxxxxxxxxxxxxx
> >> Subject: Re: [PATCH 2/2] PCI:designware:Fix iATU programming for cfg1, io
> >> and mem viewport
> >>
> >> Hi,
> >>
> >> On Thursday 20 February 2014 10:52 AM, Mohit Kumar wrote:
> >>> This patch correct iATU programming for cfg1, io and mem viewport.
> >>> Enable ATU only after configuring it.
> >>
> >> Does this patch actually fixes device enumeration behind a PCIe-pci bridge or
> >> this is more of cleaning up the sequence?
> >>
> > - This patch corrects ATU programming sequence. I am not aware of any such issue with
> > current driver. Pls specify  which bridge do you use in your setup and what is the problem?
> 
> I tried with card [1], it had a PLX bridge chip. It couldn't read the
> configuration space of the device connected to the PCIe-PCI bridge.

So do you see abort while reading config space of device connected to
the PCIe-PCI bridge?

Do you see "received master abort" bit set in your RC's cfg register
after you try to read?

Regards
Pratyush

> 
> Thanks
> Kishon
> 
> [1] -> http://ratetorate.in/products/Wiretech-PCIe%252dto%252dPCI-Bridge-Card.
> 
> > 
> > Regards
> > Mohit
> > 
> 
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