On Fri, 19 Jan 2024 at 15:00, Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx> wrote:
>
> From: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
>
> Add common helpers for getting the eDMA/HDMA max channel count.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@xxxxxxxxxxx>
> ---
> drivers/dma/dw-edma/dw-edma-core.c | 18 ++++++++++++++++++
> drivers/pci/controller/dwc/pcie-designware.c | 6 +++---
> include/linux/dma/edma.h | 14 ++++++++++++++
> 3 files changed, 35 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c
> index 7fe1c19..2bd6e43 100644
> --- a/drivers/dma/dw-edma/dw-edma-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-core.c
> @@ -902,6 +902,24 @@ static int dw_edma_irq_request(struct dw_edma *dw,
> return err;
> }
>
> +static u32 dw_edma_get_max_ch(enum dw_edma_map_format mf, enum dw_edma_dir dir)
> +{
> + if (mf == EDMA_MF_HDMA_NATIVE)
> + return HDMA_MAX_NR_CH;
This will break unless patch 5 is applied. Please move the
corresponding definition to this path.
> +
> + return dir == EDMA_DIR_WRITE ? EDMA_MAX_WR_CH : EDMA_MAX_RD_CH;
> +}
> +
> +u32 dw_edma_get_max_rd_ch(enum dw_edma_map_format mf)
> +{
> + return dw_edma_get_max_ch(mf, EDMA_DIR_READ);
> +}
> +
> +u32 dw_edma_get_max_wr_ch(enum dw_edma_map_format mf)
> +{
> + return dw_edma_get_max_ch(mf, EDMA_DIR_WRITE);
> +}
> +
> int dw_edma_probe(struct dw_edma_chip *chip)
> {
> struct device *dev;
--
With best wishes
Dmitry
